Otori; Hiroshi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Otori; Hiroshi.The latest application filed is for "system with meshed power and signal buses on cell array".

Company Profile

0.12.10

Otori; Hiroshi - Mizuho JP
Otori; Hiroshi - Tokyo JP
Otori; Hiroshi - Ome JP
Otori, Hiroshi - Ome-shi JP
Otori; Hiroshi - Plano TX
Otori; Hiroshi - Ohme JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor memory device and semiconductor device Grant 7,403,408 - Otori , et al. July 22, 2	2008-07-22
System with meshed power and signal buses on cell array Grant 7,323,727 - Kitsukawa , et al. January 29, 2	2008-01-29
System With Meshed Power And Signal Buses On Cell Array App 20070158695 - KITSUKAWA; Goro ; et al.	2007-07-12
System with meshed power and signal buses on cell array Grant 7,211,842 - Kitsukawa , et al. May 1, 2	2007-05-01
Semiconductor memory device and semiconductor device App 20050259500 - Otori, Hiroshi ; et al.	2005-11-24
System with meshed power and signal buses on cell array Grant 6,967,371 - Kitsukawa , et al. November 22, 2	2005-11-22
System with meshed power and signal buses on cell array App 20050237778 - Kitsukawa, Goro ; et al.	2005-10-27
System with meshed power and signal buses on cell array App 20050035403 - Kitsukawa, Goro ; et al.	2005-02-17
System with meshed power and signal buses on cell array Grant 6,831,317 - Kitsukawa , et al. December 14, 2	2004-12-14
System with meshed power and signal buses on cell array Grant 6,815,742 - Kitsukawa , et al. November 9, 2	2004-11-09
System With Meshed Power And Signal Buses On Cell Array App 20040129974 - Kitsukawa, Goro ; et al.	2004-07-08
System with meshed power and signal buses on cell array App 20030067018 - Kitsukawa, Goro ; et al.	2003-04-10
System with meshed power and signal buses on cell array App 20020140015 - Kitsukawa, Goro ; et al.	2002-10-03
Semiconductor device App 20020118587 - Otori, Hiroshi ; et al.	2002-08-29
Semiconductor device App 20020006062 - Otori, Hiroshi ; et al.	2002-01-17
System with meshed power and signal buses on cell array App 20020000583 - Kitsukawa, Goro ; et al.	2002-01-03
Semiconductor integrated circuit device having a constant delay-time circuit for different operating voltages Grant 5,881,005 - Otori , et al. March 9, 1	1999-03-09
Semiconductor integrated circuit device having a controlled overdriving circuit Grant 5,859,807 - Otori , et al. January 12, 1	1999-01-12
Memory regulator control method with flexibility for a wide change in supply voltage Grant 5,844,853 - Kitsukawa , et al. December 1, 1	1998-12-01
Semiconductor integrated circuit device having means for peak current reduction Grant 5,793,694 - Akiba , et al. August 11, 1	1998-08-11
Method of fabricating a semiconductor IC DRAM device enjoying enhanced focus margin Grant 5,670,409 - Otori , et al. September 23, 1	1997-09-23
Dynamic RAM and information processing system using the same Grant 5,426,603 - Nakamura , et al. June 20, 1	1995-06-20

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