Ostanevich; Alexander Y.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ostanevich; Alexander Y..The latest application filed is for "method to do control speculation on loads in a high performance strand-based loop accelerator".

Company Profile

4.10.11

Ostanevich; Alexander Y. - Moscow RU

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method to do control speculation on loads in a high performance strand-based loop accelerator Grant 10,241,789 - Ostanevich , et al.	2019-03-26
Apparatus and methods to support counted loop exits in a multi-strand loop processor Grant 10,241,794 - Scherbinin , et al.	2019-03-26
Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop accelerator Grant 10,241,801 - Iyer , et al.	2019-03-26
Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processor Grant 10,235,171 - Ostanevich , et al.	2019-03-19
Method To Do Control Speculation On Loads In A High Performance Strand-based Loop Accelerator App 20180181396 - OSTANEVICH; Alexander Y. ; et al.	2018-06-28
Method And Apparatus To Create Register Windows For Parallel Iterations To Achieve High Performance In Hw-sw Codesigned Loop Accelerator App 20180181405 - IYER; Jayesh ; et al.	2018-06-28
Method And Apparatus To Efficiently Handle Allocation Of Memory Ordering Buffers In A Multi-strand Out-of-order Loop Processor App 20180181397 - OSTANEVICH; Alexander Y. ; et al.	2018-06-28
Apparatus And Methods To Support Counted Loop Exits In A Multi-strand Loop Processor App 20180181400 - Scherbinin; Sergey P. ; et al.	2018-06-28
Apparatus And Methods Of Decomposing Loops To Improve Performance And Power Efficiency App 20180181398 - Scherbinin; Sergey P. ; et al.	2018-06-28
Hardware-assisted Software Verification And Secure Execution App 20170090929 - Muttik; Igor ; et al.	2017-03-30
Data dependence testing for loop fusion with code replication, array contraction, and loop interchange Grant 8,677,338 - Ng , et al. March 18, 2	2014-03-18
Improving data locality and parallelism by code replication Grant 8,453,134 - Ng , et al. May 28, 2	2013-05-28
Improving Data Locality And Parallelism By Code Replication And Array Contraction App 20090307674 - NG; John L. ; et al.	2009-12-10
Data Dependence Testing For Loop Fusion With Code Replication, Array Contraction, And Loop Interchange App 20090307675 - Ng; John L. ; et al.	2009-12-10
Hardware supported software pipelined loop prologue optimization Grant 6,954,927 - Ostanevich October 11, 2	2005-10-11
Register economy heuristic for a cycle driven multiple issue instruction scheduler Grant 6,718,541 - Ostanevich , et al. April 6, 2	2004-04-06
Hardware supported software pipelined loop prologue optimization App 20020133813 - Ostanevich, Alexander Y.	2002-09-19
List scheduling algorithm for a cycle-driven instruction scheduler App 20020083423 - Ostanevich, Alexander Y. ; et al.	2002-06-27
Register economy heuristic for a cycle driven multiple issue instruction scheduler App 20020013937 - Ostanevich, Alexander Y. ; et al.	2002-01-31

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