loadpatents
name:-0.023774147033691
name:-0.020401000976562
name:-0.00035691261291504
Ossimitz; Peter Patent Filings

Ossimitz; Peter

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ossimitz; Peter.The latest application filed is for "multi-level chip interconnect".

Company Profile
0.20.20
  • Ossimitz; Peter - Munich DE
  • OSSIMITZ; Peter - Muenchen DE
  • Ossimitz; Peter - Munchen DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor chip having a dense arrangement of contact terminals
Grant 10,090,251 - Ossimitz , et al. October 2, 2
2018-10-02
Multi-level chip interconnect
Grant 9,871,017 - Ossimitz , et al. January 16, 2
2018-01-16
Semiconductor device having a chip under package
Grant 9,859,251 - Beer , et al. January 2, 2
2018-01-02
Multi-level Chip Interconnect
App 20170194288 - OSSIMITZ; Peter ;   et al.
2017-07-06
Circuitry and method for monitoring a power supply of an electronic device
Grant 9,651,630 - Barrenscheen , et al. May 16, 2
2017-05-16
Semiconductor Chip Having a Dense Arrangement of Contact Terminals
App 20170025357 - Ossimitz; Peter ;   et al.
2017-01-26
Semiconductor Device Having a Chip Under Package
App 20160225745 - Beer; Gottfried ;   et al.
2016-08-04
Overmolded substrate-chip arrangement with heat sink
Grant 9,385,059 - Ossimitz , et al. July 5, 2
2016-07-05
Chip package having terminal pads of different form factors
Grant 9,362,187 - Ossimitz June 7, 2
2016-06-07
Method for manufacturing a semiconductor chip with each contact pad having a pad cell associated therewith
Grant 9,299,673 - Ossimitz , et al. March 29, 2
2016-03-29
Chip arrangement, and method for forming a chip arrangement
Grant 9,219,031 - Ossimitz , et al. December 22, 2
2015-12-22
Integrated IC package
Grant 9,204,543 - Ossimitz December 1, 2
2015-12-01
Method of manufacturing and testing a chip package
Grant 9,082,644 - Ossimitz , et al. July 14, 2
2015-07-14
Integrated Ic Package
App 20150156872 - OSSIMITZ; Peter
2015-06-04
Overmolded substrate-chip arrangement with heat sink
App 20150062825 - Ossimitz; Peter ;   et al.
2015-03-05
Circuitry And Method For Monitoring A Power Supply Of An Electronic Device
App 20150022924 - Barrenscheen; Jens ;   et al.
2015-01-22
Chip Arrangement, And Method For Forming A Chip Arrangement
App 20140332953 - Ossimitz; Peter ;   et al.
2014-11-13
Semiconductor Chip, Method For Manufacturing A Semiconductor Chip, Device And Method For Manufacturing A Device
App 20140264814 - Ossimitz; Peter ;   et al.
2014-09-18
Semiconductor memory component having a diverting circuit
Grant 8,799,704 - Ossimitz August 5, 2
2014-08-05
Chip Package Having Terminal Pads of Different Form Factors
App 20140203278 - Ossimitz; Peter
2014-07-24
Method of Manufacturing and Testing a Chip Package
App 20140206109 - Ossimitz; Peter ;   et al.
2014-07-24
Semiconductor chip comprising a plurality of contact pads and a plurality of associated pad cells
Grant 8,779,577 - Ossimitz , et al. July 15, 2
2014-07-15
Semiconductor Chip, Method For Manufacturing A Semiconductor Chip, Device And Method For Manufacturing A Device
App 20130207254 - Ossimitz; Peter ;   et al.
2013-08-15
Device for releasably receiving a semiconductor chip
Grant 8,399,265 - Ossimitz March 19, 2
2013-03-19
Device for Releasably Receiving a Semiconductor Chip
App 20120238042 - Ossimitz; Peter
2012-09-20
Electronic element comprising an electronic circuit which is to be tested and test system arrangement which is used to test the electronic element
Grant 7,640,469 - Arnold , et al. December 29, 2
2009-12-29
Rewiring substrate strip with several semiconductor component positions
Grant 7,560,801 - Ossimitz July 14, 2
2009-07-14
Rewiring substrate strip having a plurality of semiconductor component positions
Grant 7,501,701 - Ossimitz March 10, 2
2009-03-10
Semiconductor Memory Component Having A Diverting Circuit
App 20080016391 - Ossimitz; Peter
2008-01-17
Rewiring Substrate Strip Having a Plurality of Semiconductor Component Positions
App 20070063311 - Ossimitz; Peter
2007-03-22
Rewiring substrates strip with several semiconductor component positions
App 20070051984 - Ossimitz; Peter
2007-03-08
Rewiring substrate strip with a number of semiconductor component positions
Grant 7,154,116 - Gibson , et al. December 26, 2
2006-12-26
Electronic element comprising an electronic circuit which is to be tested and test system arrangement which is used to test the electronic element
App 20060190792 - Arnold; Ralf ;   et al.
2006-08-24
Multi-chip module and method for testing
App 20050086564 - Frankowsky, Gerd ;   et al.
2005-04-21
Rewiring substrate strip with a number of semiconductor component positions
App 20050082667 - Gibson, Gavin ;   et al.
2005-04-21
Apparatus and method for testing semiconductor nodules on a semiconductor substrate wafer
App 20050006726 - Ossimitz, Peter
2005-01-13

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