Osenbach; John

Patent Applications and Registrations

Patent applications and USPTO patent grants for Osenbach; John.The latest application filed is for "opto-electronic package and a method for making an opto-electronic package".

Company Profile

3.8.15

Osenbach; John - Kutztown PA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Opto-Electronic Package and a Method for Making an Opto-Electronic Package App 20210302671 - Wall, JR.; Franklin ; et al.	2021-09-30
Heterogeneous Common Substrate Multi-chip Package Including Photonic Integrated Circuit And Digital Signal Processor App 20190391348 - Osenbach; John ; et al.	2019-12-26
Optical Modules Having An Improved Optical Signal To Noise Ratio App 20190089476 - Kish, JR.; Fred A. ; et al.	2019-03-21
Optical Modules Having An Improved Optical Signal To Noise Ratio App 20190089475 - Kish, JR.; Fred A. ; et al.	2019-03-21
Optical Modules Having An Improved Optical Signal To Noise Ratio App 20180351684 - Osenbach; John ; et al.	2018-12-06
Integration of shallow trench isolation and through-substrate vias into integrated circuit designs Grant 9,613,847 - Bachman , et al. April 4, 2	2017-04-04
Method of fabrication of through-substrate vias Grant 8,987,137 - Bachman , et al. March 24, 2	2015-03-24
Fan Out Integrated Circuit Device Packages On Large Panels App 20140312495 - Osenbach; John	2014-10-23
Integration Of Shallow Trench Isolation And Through-substrate Vias Into Integrated Circuit Designs App 20140220760 - Bachman; Mark A. ; et al.	2014-08-07
Integration of shallow trench isolation and through-substrate vias into integrated circuit designs Grant 8,742,535 - Bachman , et al. June 3, 2	2014-06-03
Low-cost 3D face-to-face out assembly Grant 8,502,372 - Osenbach August 6, 2	2013-08-06
Soldering Method And Related Device For Improved Resistance To Brittle Fracture App 20120280023 - Amin; Ahmed ; et al.	2012-11-08
Soldering method and related device for improved resistance to brittle fracture with an intermetallic compound region coupling a solder mass to an Ni layer which has a low concentration of P, wherein the amount of P in the underlying Ni layer is controlled as a function of the expected volume of the Grant 8,242,378 - Amin , et al. August 14, 2	2012-08-14
Method Of Fabrication Of Through-substrate Vias App 20120153492 - Bachman; Mark A. ; et al.	2012-06-21
Integration Of Shallow Trench Isolation And Through-substrate Vias Into Integrated Circuit Designs App 20120153430 - Bachman; Mark A. ; et al.	2012-06-21
Low-cost 3d Face-to-face Out Assembly App 20120049353 - Osenbach; John	2012-03-01
Three-dimensional Electronics Package App 20100244276 - Burleson; Jeffrey P. ; et al.	2010-09-30
Soldering Method and Related Device for Improved Resistance to Brittle Fracture App 20100243300 - Amin; Ahmed ; et al.	2010-09-30
Copper Pad For Copper Wire Bonding App 20100052174 - Bachman; Mark ; et al.	2010-03-04
Optoelectronic packaging design to minimize optical subassembly tilt error App 20030035450 - He, Jing-Hua ; et al.	2003-02-20

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