Orlowski; Marius K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Orlowski; Marius K..The latest application filed is for "transistors with immersed contacts".

Company Profile

0.60.62

Orlowski; Marius K. - Austin TX US
Orlowski; Marius K. - Meylan FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Transistors with immersed contacts Grant 8,633,515 - Orlowski , et al. January 21, 2	2014-01-21
Transistors With Immersed Contacts App 20130009222 - ORLOWSKI; MARIUS K. ; et al.	2013-01-10
Transistors with immersed contacts Grant 8,314,448 - Orlowski , et al. November 20, 2	2012-11-20
Transistors With Immersed Contacts App 20110210395 - Orlowski; Marius K. ; et al.	2011-09-01
Single transistor memory cell with reduced recombination rates Grant 7,986,006 - Orlowski , et al. July 26, 2	2011-07-26
Transistor with immersed contacts and methods of forming thereof Grant 7,968,394 - Orlowski , et al. June 28, 2	2011-06-28
Process for forming an electronic device including a fin-type transistor structure Grant 7,939,412 - Orlowski , et al. May 10, 2	2011-05-10
Process of forming an electronic device including a layer of discontinuous storage elements Grant 7,932,189 - Merchant , et al. April 26, 2	2011-04-26
Method for making a semiconductor structure using silicon germanium Grant 7,927,956 - Orlowski , et al. April 19, 2	2011-04-19
Transistor devices with nano-crystal gate structures Grant 7,928,502 - Liu , et al. April 19, 2	2011-04-19
Method and apparatus for mobility enhancement in a semiconductor device Grant 7,872,311 - Orlowski , et al. January 18, 2	2011-01-18
Method to control the gate sidewall profile by graded material composition Grant 7,811,891 - Orlowski , et al. October 12, 2	2010-10-12
Semiconductor device structure Grant 7,781,840 - White , et al. August 24, 2	2010-08-24
Laterally grown nanotubes and method of formation Grant 7,772,584 - Orlowski , et al. August 10, 2	2010-08-10
Electronic Device Including A Fin-type Transistor Structure And A Process For Forming The Electronic Device App 20100190308 - Orlowski; Marius K. ; et al.	2010-07-29
Transistor Devices With Nano-crystal Gate Structures App 20100155825 - Liu; Chun-Li ; et al.	2010-06-24
Electronic device including a fin-type transistor structure and a process for forming the electronic device Grant 7,723,805 - Orlowski , et al. May 25, 2	2010-05-25
MOS device with nano-crystal gate structure Grant 7,700,438 - Liu , et al. April 20, 2	2010-04-20
MOS devices with multi-layer gate stack Grant 7,683,443 - Liu , et al. March 23, 2	2010-03-23
Method of forming semiconductor device having nanotube structures Grant 7,592,248 - Ventzek , et al. September 22, 2	2009-09-22
Programmable fuse with silicon germanium Grant 7,575,958 - Hoefler , et al. August 18, 2	2009-08-18
Single Transistor Memory Cell With Reduced Recombination Rates App 20090166700 - ORLOWSKI; Marius K. ; et al.	2009-07-02
Diffusion barrier for nickel silicides in a semiconductor fabrication process Grant 7,544,576 - Jawarani , et al. June 9, 2	2009-06-09
Method Of Forming Semiconductor Device Having Nanotube Structures App 20090142934 - Ventzek; Peter L.G. ; et al.	2009-06-04
Charge storage structure formation in transistor with vertical channel region Grant 7,535,060 - Orlowski May 19, 2	2009-05-19
Mos Devices With Multi-layer Gate Stack App 20090115001 - Liu; Chun-Li ; et al.	2009-05-07
Single transistor memory cell with reduced recombination rates Grant 7,517,741 - Orlowski , et al. April 14, 2	2009-04-14
MOS device with multi-layer gate stack Grant 7,510,956 - Liu , et al. March 31, 2	2009-03-31
Process for forming an electronic device including semiconductor fins Grant 7,456,055 - Orlowski , et al. November 25, 2	2008-11-25
Method for forming a semiconductor device having a fin and structure thereof Grant 7,442,590 - Orlowski October 28, 2	2008-10-28
Semiconductor process for forming stress absorbent shallow trench isolation structures Grant 7,442,621 - Orlowski , et al. October 28, 2	2008-10-28
Dual surface SOI by lateral epitaxial overgrowth Grant 7,435,639 - Winstead , et al. October 14, 2	2008-10-14
Laterally Grown Nanotubes And Method Of Formation App 20080211102 - Orlowski; Marius K. ; et al.	2008-09-04
Electronic Device Including A Layer Of Discontinuous Storage Elements And A Process For Forming The Electronic Device App 20080182428 - Merchant; Tushar P. ; et al.	2008-07-31
Method for forming an electronic device Grant 7,402,476 - Orlowski , et al. July 22, 2	2008-07-22
Laterally grown nanotubes and method of formation Grant 7,371,677 - Orlowski , et al. May 13, 2	2008-05-13
Method of making a multi-bit non-volatile memory (NVM) cell and structure Grant 7,364,970 - Orlowski , et al. April 29, 2	2008-04-29
Multi-channel transistor structure and method of making thereof Grant 7,354,831 - Orlowski April 8, 2	2008-04-08
Semiconductor process with first transistor types oriented in a first plane and second transistor types oriented in a second plane Grant 7,354,814 - Orlowski , et al. April 8, 2	2008-04-08
FinFET structure with contacts Grant 7,339,241 - Orlowski , et al. March 4, 2	2008-03-04
Method And Apparatus For Mobility Enhancement In A Semiconductor Device App 20080006880 - Orlowski; Marius K. ; et al.	2008-01-10
Method For Forming A Semiconductor Device And Structure Thereof App 20080003725 - Orlowski; Marius K.	2008-01-03
Method for producing two gates controlling the same channel Grant 7,312,129 - Goktepeli , et al. December 25, 2	2007-12-25
Dual surface SOI by lateral epitaxial overgrowth App 20070281446 - Winstead; Brian A. ; et al.	2007-12-06
Self correcting suppression of threshold voltage variation in fully depleted transistors Grant 7,291,521 - Orlowski , et al. November 6, 2	2007-11-06
Method For Forming A Semiconductor Device Having A Fin An Structure Thereof App 20070254435 - Orlowski; Marius K.	2007-11-01
Method and apparatus for mobility enhancement in a semiconductor device Grant 7,288,448 - Orlowski , et al. October 30, 2	2007-10-30
Semiconductor Device Structure And Method Therefor App 20070235807 - White; Ted R. ; et al.	2007-10-11
Laterally grown nanotubes and method of formation App 20070231946 - Orlowski; Marius K. ; et al.	2007-10-04
Semiconductor Device Having A Gate With A Thin Conductive Layer App 20070218640 - Goktepeli; Sinan ; et al.	2007-09-20
Electronic device including a semiconductor fin and a process for forming the electronic device App 20070218628 - Orlowski; Marius K. ; et al.	2007-09-20
Semiconductor device having a plurality of different layers and method therefor Grant 7,271,069 - Orlowski , et al. September 18, 2	2007-09-18
Charge storage structure formation in transistor with vertical channel region App 20070210338 - Orlowski; Marius K.	2007-09-13
Method for making a multibit transistor App 20070212832 - Orlowski; Marius K.	2007-09-13
Method for removing a semiconductor layer Grant 7,256,077 - Orlowski August 14, 2	2007-08-14
MOS device with nano-crystal gate structure App 20070176227 - Liu; Chun-Li ; et al.	2007-08-02
MOS device with multi-layer gate stack App 20070176247 - Liu; Chun-Li ; et al.	2007-08-02
Method for producing two gates controlling the same channel App 20070173024 - Goktepeli; Sinan ; et al.	2007-07-26
Method to control the gate sidewall profile by graded material composition App 20070166902 - Orlowski; Marius K. ; et al.	2007-07-19
Electronic device including a fin-type transistor structure and a process for forming the electronic device App 20070158764 - Orlowski; Marius K. ; et al.	2007-07-12
Transistor with immersed contacts and methods of forming thereof App 20070161170 - Orlowski; Marius K. ; et al.	2007-07-12
Semiconductor fabrication process employing stress inducing source drain structures with graded impurity concentration Grant 7,238,580 - Orlowski , et al. July 3, 2	2007-07-03
Single transistor memory cell with reduced programming voltages Grant 7,238,555 - Orlowski , et al. July 3, 2	2007-07-03
Semiconductor Device And Method For Regional Stress Control App 20070148894 - Orlowski; Marius K. ; et al.	2007-06-28
Semiconductor device having a gate with a thin conductive layer Grant 7,235,847 - Goktepeli , et al. June 26, 2	2007-06-26
Semiconductor device structure and method therefor Grant 7,226,833 - White , et al. June 5, 2	2007-06-05
Processes for forming electronic devices including a semiconductor layer Grant 7,217,667 - Orlowski , et al. May 15, 2	2007-05-15
MOSFET dielectric including a diffusion barrier App 20070096226 - Liu; Chun-Li ; et al.	2007-05-03
Semiconductor device and method for regional stress control Grant 7,205,202 - Orlowski , et al. April 17, 2	2007-04-17
Programmable fuse with silicon germanium App 20070082431 - Hoefler; Alexander B. ; et al.	2007-04-12
Method For Making A Semiconductor Structure Using Silicon Germanium App 20070082453 - Orlowski; Marius K. ; et al.	2007-04-12
Method of making a planar double-gated transistor Grant 7,202,117 - Orlowski April 10, 2	2007-04-10
Method of making a multi-bit nov-volatile memory (NYM) cell and structure App 20070077706 - Orlowski; Marius K. ; et al.	2007-04-05
Semiconductor fabrication process employing spacer defined vias App 20070072334 - Orlowski; Marius K. ; et al.	2007-03-29
Method for making a semiconductor structure using silicon germanium Grant 7,195,963 - Orlowski , et al. March 27, 2	2007-03-27
FinFET structure with contacts App 20070045735 - Orlowski; Marius K. ; et al.	2007-03-01
Multi-channel transistor structure and method of making thereof App 20070029586 - Orlowski; Marius K.	2007-02-08
Diffusion barrier for nickel silicides in a semiconductor fabrication process App 20070026593 - Jawarani; Dharmesh ; et al.	2007-02-01
Method and apparatus for performance enhancement in an asymmetrical semiconductor device Grant 7,166,897 - Orlowski , et al. January 23, 2	2007-01-23
Method for making a semiconductor structure using silicon germanium Grant 7,163,903 - Orlowski , et al. January 16, 2	2007-01-16
Single transistor memory cell with reduced recombination rates App 20070001222 - Orlowski; Marius K. ; et al.	2007-01-04
Single transistor memory cell with reduced programming voltages App 20070001162 - Orlowski; Marius K. ; et al.	2007-01-04
Method for forming an electronic device App 20060286736 - Orlowski; Marius K. ; et al.	2006-12-21
Isolation trench perimeter implant for threshold voltage control Grant 7,135,379 - Orlowski , et al. November 14, 2	2006-11-14
Semiconductor device having a plurality of different layers and method therefor App 20060240650 - Orlowski; Marius K. ; et al.	2006-10-26
Self correcting suppression of threshold voltage variation in fully depleted transistors App 20060240629 - Orlowski; Marius K. ; et al.	2006-10-26
Semiconductor device and method for regional stress control App 20060240609 - Orlowski; Marius K. ; et al.	2006-10-26
Transistor having multiple channels Grant 7,112,832 - Orlowski , et al. September 26, 2	2006-09-26
Method for forming a semiconductor device having a notched control electrode and structure thereof Grant 7,105,430 - Orlowski , et al. September 12, 2	2006-09-12
Semiconductor Device With Multiple Semiconductor Layers App 20060194384 - Venkatesan; Suresh ; et al.	2006-08-31
Processes for forming electronic devices including a semiconductor layer App 20060183288 - Orlowski; Marius K. ; et al.	2006-08-17
Method of making a planar double-gated transistor App 20060172468 - Orlowski; Marius K.	2006-08-03
Semiconductor fabrication process employing stress inducing source drain structures with graded impurity concentration App 20060166492 - Orlowski; Marius K. ; et al.	2006-07-27
Semiconductor process for forming stress absorbent shallow trench isolation structures App 20060110892 - Orlowski; Marius K. ; et al.	2006-05-25
Method for forming a semiconductor device with local semiconductor-on-insulator (SOI) Grant 7,045,432 - Orlowski , et al. May 16, 2	2006-05-16
Semiconductor device structure and method therefor App 20060094169 - White; Ted R. ; et al.	2006-05-04
Low RC product transistors in SOI semiconductor process Grant 7,037,795 - Barr , et al. May 2, 2	2006-05-02
Low Rc Product Transistors In Soi Semiconductor Process App 20060084235 - Barr; Alexander L. ; et al.	2006-04-20
Method of manufacturing SOI template layer Grant 7,029,980 - Liu , et al. April 18, 2	2006-04-18
Isolation trench perimeter implant for threshold voltage control App 20060068542 - Orlowski; Marius K. ; et al.	2006-03-30
Semiconductor device having a gate with a thin conductive layer App 20060060928 - Goktepeli; Sinan ; et al.	2006-03-23
Semiconductor process with first transistor types oriented in a first plane and second transistor types oriented in a second plane App 20060063320 - Orlowski; Marius K. ; et al.	2006-03-23
Method and apparatus for performance enhancement in an asymmetrical semiconductor device App 20060043498 - Orlowski; Marius K. ; et al.	2006-03-02
Method and apparatus for mobility enhancement in a semiconductor device App 20060046366 - Orlowski; Marius K. ; et al.	2006-03-02
Semiconductor device with multiple semiconductor layers App 20050275018 - Venkatesan, Suresh ; et al.	2005-12-15
Method for making a semiconductor structure using silicon germanium App 20050260807 - Orlowski, Marius K. ; et al.	2005-11-24
Method for removing a semiconductor layer App 20050260816 - Orlowski, Marius K.	2005-11-24
Method for forming a semiconductor device having isolation regions Grant 6,964,911 - Orlowski , et al. November 15, 2	2005-11-15
Method for making a semiconductor structure using silicon germanium App 20050245092 - Orlowski, Marius K. ; et al.	2005-11-03
Method for forming a semiconductor device having a notched control electrode and structure thereof App 20050215008 - Orlowski, Marius K. ; et al.	2005-09-29
Transistor having multiple channels App 20050167650 - Orlowski, Marius K. ; et al.	2005-08-04
Method for forming a semiconductor device with local semiconductor-on-insulator (SOI) App 20050170604 - Orlowski, Marius K. ; et al.	2005-08-04
Method of forming a transistor having multiple channels Grant 6,921,700 - Orlowski , et al. July 26, 2	2005-07-26
SOI template layer App 20050070056 - Liu, Chun-Li ; et al.	2005-03-31
Method for forming a semiconductor device having isolation regions App 20050064669 - Orlowski, Marius K. ; et al.	2005-03-24
Method of forming a transistor having multiple channels and structure thereof App 20050023619 - Orlowski, Marius K. ; et al.	2005-02-03
Semiconductor structure with different lattice constant materials and method for forming the same Grant 6,831,350 - Liu , et al. December 14, 2	2004-12-14
Process for forming a transistor with a nonuniformly doped channel Grant 5,741,736 - Orlowski , et al. April 21, 1	1998-04-21
Process for forming an electrically programmable read-only memory cell Grant 5,705,415 - Orlowski , et al. January 6, 1	1998-01-06
Process for forming field isolation Grant 5,432,118 - Orlowski , et al. July 11, 1	1995-07-11
Field effect transistor having a gate dielectric with variable thickness Grant 5,314,834 - Mazure , et al. May 24, 1	1994-05-24

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