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Patent applications and USPTO patent grants for Onozawa; Kazunori.The latest application filed is for "semiconductor device having misfet sram cells in which active regions and gate electrodes are dimensioned for increasing storage node capacitances without increasing memory cell size".
Patent | Date |
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Semiconductor device having MISFET SRAM cells in which active regions and gate electrodes are dimensioned for increasing storage node capacitances without increasing memory cell size Grant 5,903,036 - Onozawa May 11, 1 | 1999-05-11 |
Caliper sensor Grant 5,722,285 - Tsuchiya , et al. March 3, 1 | 1998-03-03 |
Method of forming semiconductor device including a CMOS structure having double-doped channel regions Grant 5,290,714 - Onozawa March 1, 1 | 1994-03-01 |
Method of making a semiconductor integrated circuit device having resistance elements Grant 4,990,461 - Onozawa February 5, 1 | 1991-02-05 |
Semiconductor device Grant 4,868,626 - Nakazato , et al. * September 19, 1 | 1989-09-19 |
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