Onogami; Takeshi
Patent Applications and Registrations
Patent applications and USPTO patent grants for Onogami; Takeshi.The latest application filed is for "semiconductor package with multilayer mold".
- Onogami; Takeshi - Oita JP
- Onogami; Takeshi - Beppu JP
- Onogami; Takeshi - Beppu Oita JP
| Patent | Date |
|---|---|
| Semiconductor package with multilayer mold Grant 10,879,144 - Aoya , et al. December 29, 2 | 2020-12-29 |
| Semiconductor Package With Multilayer Mold App 20200058570 - Aoya; Kengo ; et al. | 2020-02-20 |
| Dual Sided Embedded Die And Fabrication Of Same Background App 20160240392 - Poddar; Anindya ; et al. | 2016-08-18 |
| Dual Sided Embedded Die And Fabrication Of Same Background App 20150147845 - Poddar; Anindya ; et al. | 2015-05-28 |
| Method And Structure Of Panelized Packaging Of Semiconductor Devices App 20150008566 - Gerber; Mark A. ; et al. | 2015-01-08 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 