loadpatents
name:-0.015271186828613
name:-0.013900995254517
name:-0.0044629573822021
Ong; Hung Patent Filings

Ong; Hung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ong; Hung.The latest application filed is for "prefetch kill and revival in an instruction cache".

Company Profile
4.10.13
  • Ong; Hung - Plano TX
  • Ong; Hung - Richardson TX
  • Ong; Hung - Vancouver WA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Prefetch Kill And Revival In An Instruction Cache
App 20220245069 - Heremagalur Ramaprasad; Bipin Prasad ;   et al.
2022-08-04
Prefetch kill and revival in an instruction cache
Grant 11,314,660 - Heremagalur Ramaprasad , et al. April 26, 2
2022-04-26
Prefetch Management In A Hierarchical Cache System
App 20220058127 - Heremagalur Ramaprasad; Bipin Prasad ;   et al.
2022-02-24
Prefetch management in a hierarchical cache system
Grant 11,169,924 - Heremagalur Ramaprasad , et al. November 9, 2
2021-11-09
Zero Latency Prefetching In Caches
App 20210141732 - Olorode; Oluleye ;   et al.
2021-05-13
Zero latency prefetching in caches
Grant 10,929,296 - Olorode , et al. February 23, 2
2021-02-23
Prefetch Management In A Hierarchical Cache System
App 20200320006 - Heremagalur Ramaprasad; Bipin Prasad ;   et al.
2020-10-08
Prefetch management in a hierarchical cache system
Grant 10,642,742 - Heremagalur Ramaprasad , et al.
2020-05-05
Prefetch Kill And Revival In An Instruction Cache
App 20200089622 - Heremagalur Ramaprasad; Bipin Prasad ;   et al.
2020-03-19
Prefetch Management In A Hierarchical Cache System
App 20200057720 - Heremagalur Ramaprasad; Bipin Prasad ;   et al.
2020-02-20
Prefetch kill and revival in an instruction cache
Grant 10,489,305 - Heremagalur Ramaprasad , et al. Nov
2019-11-26
Zero Latency Prefetching In Caches
App 20190114263 - Olorode; Oluleye ;   et al.
2019-04-18
Using L1 cache as re-order buffer
Grant 9,652,392 - Venkatasubramanian , et al. May 16, 2
2017-05-16
Using L1 Cache As Re-order Buffer
App 20170010967 - Venkatasubramanian; Ramakrishnan ;   et al.
2017-01-12
Using L1 cache as re-order buffer
Grant 9,471,320 - Venkatasubramanian , et al. October 18, 2
2016-10-18
Using L1 Cache As Re-order Buffer
App 20160019151 - Venkatasubramanian; Ramakrishnan ;   et al.
2016-01-21
Independent source read and destination write enhanced DMA
Grant 7,577,774 - Agarwala , et al. August 18, 2
2009-08-18
Spinel boules, wafers, and methods for fabricating same
Grant 7,326,477 - Stone-Sundberg , et al. February 5, 2
2008-02-05
Independent source read and destination write enhanced DMA
App 20060256796 - Agarwala; Sanjive ;   et al.
2006-11-16
Spinel articles and methods for forming same
Grant 7,045,223 - Kokta , et al. May 16, 2
2006-05-16
Spinel articles and methods for forming same
App 20050061230 - Kokta, Milan ;   et al.
2005-03-24
Spinel articles and methods for forming same
App 20050064246 - Kokta, Milan ;   et al.
2005-03-24
Spinel boules, wafers, and methods for fabricating same
App 20050061231 - Stone-Sundberg, Jennifer ;   et al.
2005-03-24

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