loadpatents
name:-0.0064749717712402
name:-0.01326584815979
name:-0.00055789947509766
Okuda; Yasushi Patent Filings

Okuda; Yasushi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Okuda; Yasushi.The latest application filed is for "soot blower".

Company Profile
2.11.4
  • Okuda; Yasushi - Hiroshima JP
  • Okuda; Yasushi - Kyoto JP
  • Okuda; Yasushi - Osaka JP
  • Okuda, Yasushi - Kyoto-shi JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Soot blower
Grant 10,962,223 - Sakashita , et al. March 30, 2
2021-03-30
Soot Blower
App 20190078779 - Sakashita; Gen ;   et al.
2019-03-14
Method of manufacturing semiconductor device
Grant 6,753,222 - Mimuro , et al. June 22, 2
2004-06-22
Nonvolatile semiconductor memory device and method for driving the same
Grant 6,657,893 - Takahashi , et al. December 2, 2
2003-12-02
Method for manufacturing semiconductor device
App 20030082878 - Mimuro, Ken ;   et al.
2003-05-01
Method for fabricating semiconductor device using a CVD insulator film
Grant 6,472,281 - Doi , et al. October 29, 2
2002-10-29
Nonvolatile semiconductor memory device and method for driving the same
App 20020064071 - Takahashi, Keita ;   et al.
2002-05-30
Semiconductor wafer package, method and apparatus for connecting testing IC terminals of semiconductor wafer and probe terminals, testing method of a semiconductor integrated circuit, probe card and its manufacturing method
Grant 6,323,663 - Nakata , et al. November 27, 2
2001-11-27
Method For Fabricating Semiconductor Device Using A Cvd Insulator Film
App 20010026982 - DOI, HIROYUKI ;   et al.
2001-10-04
Semiconductor wafer package, method and apparatus for connecting testing IC terminals of semiconductor wafer and probe terminals, testing method of a semiconductor integrated circuit, probe card and its manufacturing method
Grant 6,005,401 - Nakata , et al. December 21, 1
1999-12-21
Semiconductor wafer package, method and apparatus for connecting testing IC terminals of semiconductor wafer and probe terminals, testing method of a semiconductor integrated circuit, probe card and its manufacturing method
Grant 5,945,834 - Nakata , et al. August 31, 1
1999-08-31
Method for driving a non-volatile semiconductor memory
Grant 5,715,196 - Odake , et al. February 3, 1
1998-02-03
Non-volatile semiconductor memory having an array of non-volatile memory cells and method for driving the same
Grant 5,627,779 - Odake , et al. May 6, 1
1997-05-06
Semiconductor memory device having an energy gap for high speed operation
Grant 5,359,554 - Odake , et al. October 25, 1
1994-10-25
Ink composition
Grant 4,657,591 - Shioi , et al. April 14, 1
1987-04-14

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed