Okina; Teruo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Okina; Teruo.The latest application filed is for "three-dimensional memory device including trench-isolated memory planes and method of making the same".

Company Profile

2.8.11

Okina; Teruo - Yokkaichi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor die including diffusion barrier layers embedding bonding pads and methods of forming the same Grant 11,450,624 - Oda , et al. September 20, 2	2022-09-20
Semiconductor die including diffusion barrier layers embedding bonding pads and methods of forming the same Grant 11,444,039 - Oda , et al. September 13, 2	2022-09-13
Three-dimensional memory device with separated source-side lines and method of making the same Grant 11,393,836 - Tsutsumi , et al. July 19, 2	2022-07-19
Three-dimensional Memory Device Including Trench-isolated Memory Planes And Method Of Making The Same App 20220189984 - OKINA; Teruo	2022-06-16
Three-dimensional Memory Device With Separated Source-side Lines And Method Of Making The Same App 20220157842 - TSUTSUMI; Masanori ; et al.	2022-05-19
Three-dimensional Memory Device With Separated Source-side Lines And Method Of Making The Same App 20220157841 - TSUTSUMI; Masanori ; et al.	2022-05-19
Semiconductor die containing dummy metallic pads and methods of forming the same Grant 11,322,466 - Okina May 3, 2	2022-05-03
Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer Grant 11,201,107 - Okina , et al. December 14, 2	2021-12-14
Bonded three-dimensional memory devices and methods of making the same by replacing carrier substrate with source layer Grant 11,195,781 - Okina , et al. December 7, 2	2021-12-07
Semiconductor Die Including Diffusion Barrier Layers Embedding Bonding Pads And Methods Of Forming The Same App 20210375791 - ODA; Noriaki ; et al.	2021-12-02
Semiconductor Die Including Diffusion Barrier Layers Embedding Bonding Pads And Methods Of Forming The Same App 20210375790 - ODA; Noriaki ; et al.	2021-12-02
Semiconductor Die Containing Dummy Metallic Pads And Methods Of Forming The Same App 20210366855 - OKINA; Teruo	2021-11-25
Method of forming a three-dimensional memory device and a driver circuit on opposite sides of a substrate Grant 11,094,704 - Zhang , et al. August 17, 2	2021-08-17
Bonding pads embedded in a dielectric diffusion barrier and having recessed metallic liners Grant 11,088,076 - Okina August 10, 2	2021-08-10
Bonding Pads Embedded in a Dielectric Diffusion Barrier and having Recessed Metallic Liners App 20210202382 - OKINA; Teruo	2021-07-01
Method Of Forming A Three-dimensional Memory Device And A Driver Circuit On Opposite Sides Of A Substrate App 20210134819 - ZHANG; Yanli ; et al.	2021-05-06
Bonded Three-dimensional Memory Devices And Methods Of Making The Same By Replacing Carrier Substrate With Source Layer App 20210091063 - NINOMIYA; Takeki ; et al.	2021-03-25
Bonded Three-dimensional Memory Devices And Methods Of Making The Same By Replacing Carrier Substrate With Source Layer App 20200258817 - A1	2020-08-13
Bonded Three-dimensional Memory Devices And Methods Of Making The Same By Replacing Carrier Substrate With Source Layer App 20200258816 - A1	2020-08-13

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