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Patent applications and USPTO patent grants for Okamoto; Dan.The latest application filed is for "quad flat no lead package and method of making".
Patent | Date |
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Quad Flat No Lead Package And Method Of Making App 20200251352 - Kind Code | 2020-08-06 |
Quad flat no lead package and method of making Grant 10,665,475 - Okamoto , et al. | 2020-05-26 |
Lead Frame With Solder Sidewalls App 20170352609 - Okamoto; Dan | 2017-12-07 |
Lead Frame With Solder Sidewalls App 20170271244 - Okamoto; Dan | 2017-09-21 |
Circuit substrate interconnect Grant 9,536,753 - Koto , et al. January 3, 2 | 2017-01-03 |
Dual Transistors Fabricated On Lead Frames And Method Of Fabrication App 20160315036 - Shibuya; Makoto ;   et al. | 2016-10-27 |
Method Of Making A Qfn Package App 20160307831 - Okamoto; Dan | 2016-10-20 |
Method of making a QFN package Grant 9,379,087 - Okamoto June 28, 2 | 2016-06-28 |
QFN Package App 20160133599 - Okamoto; Dan | 2016-05-12 |
Circuit Substrate Interconnect App 20160099226 - KOTO; Yohei ;   et al. | 2016-04-07 |
Quad Flat No Lead Package And Method Of Making App 20150364373 - Okamoto; Dan ;   et al. | 2015-12-17 |
Solder Coated Clip And Integrated Circuit Packaging Method App 20150348881 - Okamoto; Dan | 2015-12-03 |
Integrated Circuit Die And Package App 20150340324 - Hayata; Kazunori ;   et al. | 2015-11-26 |
Semiconductor Die Collet and Method App 20130264836 - OKAMOTO; Dan ;   et al. | 2013-10-10 |
Semiconductor die collet Grant 8,465,619 - Okamoto , et al. June 18, 2 | 2013-06-18 |
Semiconductor Die Collet and Method App 20100289159 - OKAMOTO; Dan ;   et al. | 2010-11-18 |
Semiconductor die collet and method Grant 7,790,507 - Okamoto , et al. September 7, 2 | 2010-09-07 |
Semiconductor Die Collet and Method App 20080233680 - Okamoto; Dan ;   et al. | 2008-09-25 |
Method and apparatus for fine pitch solder joint App 20070037376 - Okamoto; Dan | 2007-02-15 |
Stress distribution package App 20050133913 - Okamoto, Dan | 2005-06-23 |
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