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name:-0.032268047332764
name:-0.046696186065674
name:-0.013807058334351
Okajima; Yoshinori Patent Filings

Okajima; Yoshinori

Patent Applications and Registrations

Patent applications and USPTO patent grants for Okajima; Yoshinori.The latest application filed is for "semiconductor integrated circuit and power supply control system provided with a plurality of semiconductor integrated circuits".

Company Profile
1.38.23
  • Okajima; Yoshinori - Osaka JP
  • Okajima; Yoshinori - Kawasaki JP
  • OKAJIMA; Yoshinori - Kanagawa JP
  • Okajima; Yoshinori - Kawasaki-shi JP
  • Okajima; Yoshinori - Yokohama JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor integrated circuit, display device provided with same, and control method
Grant 10,855,946 - Okajima , et al. December 1, 2
2020-12-01
Semiconductor integrated circuit and power supply control system provided with a plurality of semiconductor integrated circuits
Grant 9,880,572 - Okajima , et al. January 30, 2
2018-01-30
Semiconductor Integrated Circuit And Power Supply Control System Provided With A Plurality Of Semiconductor Integrated Circuits
App 20170336816 - OKAJIMA; Yoshinori ;   et al.
2017-11-23
Semiconductor integrated circuit and power supply control system provided with a plurality of semiconductor integrated circuits
Grant 9,766,640 - Okajima , et al. September 19, 2
2017-09-19
Semiconductor Integrated Circuit, Display Device Provided With Same, And Control Method
App 20170127011 - OKAJIMA; Yoshinori ;   et al.
2017-05-04
Semiconductor Integrated Circuit And Power Supply Control System Provided With A Plurality Of Semiconductor Integrated Circuits
App 20160179111 - OKAJIMA; Yoshinori ;   et al.
2016-06-23
Memory system
Grant 7,941,730 - Ogawa , et al. May 10, 2
2011-05-10
Semiconductor memory
Grant 7,937,645 - Ogawa , et al. May 3, 2
2011-05-03
Memory system including nonvolatile memory and volatile memory and operating method of same
Grant 7,827,468 - Kato , et al. November 2, 2
2010-11-02
Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
Grant 7,633,326 - Okajima December 15, 2
2009-12-15
Memory system using single wavelength optical transmission
Grant 7,561,455 - Ogawa , et al. July 14, 2
2009-07-14
Audio Synchronizer For Digital Television Broadcast
App 20090128698 - OKAJIMA; Yoshinori ;   et al.
2009-05-21
Semiconductor integrated circuit device
Grant 7,533,196 - Tojima , et al. May 12, 2
2009-05-12
Electronic circuit system, and signal transmission method, to improve signal transmission efficiency and simplify signal transmission management
Grant 7,428,182 - Okajima September 23, 2
2008-09-23
Memory system
Grant 7,417,884 - Ogawa , et al. August 26, 2
2008-08-26
Signal interface
Grant 7,388,791 - Kato , et al. June 17, 2
2008-06-17
Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
Grant 7,368,967 - Okajima May 6, 2
2008-05-06
Memory system
App 20070230231 - Ogawa; Toshio ;   et al.
2007-10-04
Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
App 20070188210 - Okajima; Yoshinori
2007-08-16
Memory system
App 20070189052 - Ogawa; Toshio ;   et al.
2007-08-16
Semiconductor memory
App 20070192664 - Ogawa; Toshio ;   et al.
2007-08-16
Memory system
App 20070192527 - Ogawa; Toshio ;   et al.
2007-08-16
Semiconductor memory
App 20070189100 - Ogawa; Toshio ;   et al.
2007-08-16
Signal interface
App 20070091989 - Kato; Yoshiharu ;   et al.
2007-04-26
Memory system and operating method of same
App 20070091678 - Kato; Yoshiharu ;   et al.
2007-04-26
Semiconductor integrated circuit device
App 20070043886 - Tojima; Masayoshi ;   et al.
2007-02-22
Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
App 20060273840 - Okajima; Yoshinori
2006-12-07
Semiconductor integrated circuit device
Grant 7,139,849 - Tojima , et al. November 21, 2
2006-11-21
Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
Grant 7,119,595 - Okajima October 10, 2
2006-10-10
Semiconductor device, semiconductor system, and digital delay circuit
App 20050242864 - Kawasaki, Kenichi ;   et al.
2005-11-03
Data burst transfer circuit, parallel-serial and serial-parallel conversion circuits, and an oscillation circuit
Grant 6,928,496 - Okajima August 9, 2
2005-08-09
Variable digital delay line
Grant 6,873,199 - Nishimura , et al. March 29, 2
2005-03-29
Timing Controller And Controlled Delay Circuit For Controlling Timing Or Delay Time Of A Signal By Changing Phase Thereof
App 20040160254 - OKAJIMA, Yoshinori
2004-08-19
Data burst transfer circuit, parallel-serial and serial-parallel conversion circuits, and an oscillation circuit
App 20040150539 - Okajima, Yoshinori
2004-08-05
Data burst transfer circuit, parallel-serial and serial-parallel conversion circuits, and an oscillation circuit
Grant 6,701,396 - Okajima March 2, 2
2004-03-02
Semiconductor integrated circuit device
App 20040030844 - Tojima, Masayoshi ;   et al.
2004-02-12
Semiconductor device, semiconductor system, and digital delay circuit
App 20030076143 - Nishimura, Koichi ;   et al.
2003-04-24
Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
App 20020145459 - Okajima, Yoshinori
2002-10-10
Serial/parallel converter
Grant 6,373,414 - Koga , et al. April 16, 2
2002-04-16
Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
App 20020036533 - Okajima, Yoshinori
2002-03-28
Variable Delay Circuit And Semiconductor Integrated Circuit Device
App 20020021157 - Eto, Satoshi ;   et al.
2002-02-21
Data burst transfer circuit, parallel-serial and serial-parallel conversion circuits, and an oscillation circuit
App 20010054122 - Okajima, Yoshinori
2001-12-20
Phase comparator circuit for high speed signals in delay locked loop circuit
Grant 6,194,916 - Nishimura , et al. February 27, 2
2001-02-27
Serial/parallel converter using holding and latch flip-flops
Grant 6,097,323 - Koga , et al. August 1, 2
2000-08-01
Interface circuit capable of preventing reflected waves and glitches
Grant 6,094,091 - Okajima July 25, 2
2000-07-25
Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof
Grant 6,081,147 - Okajima June 27, 2
2000-06-27
Pipeline memory access using DRAM with multiple independent banks
Grant 6,055,615 - Okajima April 25, 2
2000-04-25
Variable delay circuit and semiconductor integrated circuit device
Grant 6,049,239 - Eto , et al. April 11, 2
2000-04-11
System configured of synchronous semiconductor device for adjusting timing of each input and semiconductor device used therefor
Grant 6,028,816 - Takemae , et al. February 22, 2
2000-02-22
Electronic circuit apparatus for transmitting signals through a bus and semiconductor device for generating a predetermined stable voltage
Grant 5,955,889 - Taguchi , et al. September 21, 1
1999-09-21
Integrated circuit device, semiconductor memory, and integrated circuit system coping with high-frequency clock signal
Grant 5,838,630 - Okajima November 17, 1
1998-11-17
Semiconductor memory device with an increased band width
Grant 5,838,604 - Tsuboi , et al. November 17, 1
1998-11-17
Input buffer circuit, integrated circuit device, semiconductor memory, and integrated circuit system coping with high-frequency clock signal
Grant 5,793,680 - Okajima August 11, 1
1998-08-11
Semiconductor integrated circuit device
Grant 5,412,615 - Noro , et al. May 2, 1
1995-05-02
Semiconductor integrated circuit including P-channel MOS transistors having different threshold voltages
Grant 5,200,921 - Okajima April 6, 1
1993-04-06
Semiconductor memory device having a redundancy
Grant 5,083,294 - Okajima January 21, 1
1992-01-21
Bipolar-transistor type random access memory having redundancy configuration
Grant 4,744,060 - Okajima May 10, 1
1988-05-10
Emitter coupled semiconductor memory device having a low potential source having two states
Grant 4,740,918 - Okajima , et al. April 26, 1
1988-04-26
Semiconductor memory device
Grant 4,677,455 - Okajima June 30, 1
1987-06-30
Semiconductor device
Grant 4,636,831 - Ono , et al. January 13, 1
1987-01-13
Semiconductor memory device
Grant 4,604,728 - Okajima August 5, 1
1986-08-05

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