Okabe; Hideyuki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Okabe; Hideyuki.The latest application filed is for "method of supporting layout design of semiconductor integrated circuit".

Company Profile

0.7.8

Okabe; Hideyuki - Kanagawa N/A JP
Okabe; Hideyuki - Tokyo JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of supporting layout design of semiconductor integrated circuit Grant 8,499,268 - Okabe July 30, 2	2013-07-30
PLL frequency synthesizer Grant 8,373,461 - Okabe February 12, 2	2013-02-12
Method Of Supporting Layout Design Of Semiconductor Integrated Circuit App 20120221992 - OKABE; Hideyuki	2012-08-30
Pll Frequency Synthesizer App 20110285435 - Okabe; Hideyuki	2011-11-24
Modulation circuit Grant 7,804,375 - Kobayashi , et al. September 28, 2	2010-09-28
Balun circuit and frequency converting apparatus Grant 7,633,353 - Okabe December 15, 2	2009-12-15
Balun Circuit And Frequency Converting Apparatus App 20090102576 - OKABE; HIDEYUKI	2009-04-23
Modulation Circuit App 20090102573 - KOBAYASHI; NORIO ; et al.	2009-04-23
Layout design program, layout design device and layout design method for semiconductor integrated circuit Grant 7,516,434 - Okabe April 7, 2	2009-04-07
Frequency converter App 20070099590 - Okabe; Hideyuki ; et al.	2007-05-03
Layout design program, layout design device and layout design method for semiconductor integrated circuit App 20060265678 - Okabe; Hideyuki	2006-11-23
Integrated circuit verification method, verification apparatus, and verification program App 20060117283 - Katou; Tetsuya ; et al.	2006-06-01
Method and apparatus for automatic arrangement and wiring for a semiconductor integrated circuit design and wiring program therefor App 20030135837 - Okabe, Hideyuki	2003-07-17

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