Okabayashi; Hazuki
Patent Applications and Registrations
Patent applications and USPTO patent grants for Okabayashi; Hazuki.The latest application filed is for "multiprocessor system".
- Okabayashi; Hazuki - Kyoto JP
- Okabayashi; Hazuki - Osaka JP
- Okabayashi; Hazuki - Hirakata JP
- Okabayashi; Hazuki - Hirakata-shi JP
| Patent | Date |
|---|---|
| Multiprocessor system for comparing execution order of tasks to a failure pattern Grant 9,170,841 - Fukuzaki , et al. October 27, 2 | 2015-10-27 |
| Multiprocessor System App 20130104137 - FUKUZAKI; Kiyokazu ; et al. | 2013-04-25 |
| Cache Memory And Method For Cache Entry Replacement Based On Modified Access Order App 20110179227 - OKABAYASHI; Hazuki ; et al. | 2011-07-21 |
| Parallel caches operating in exclusive address ranges Grant 7,970,998 - Yamamoto , et al. June 28, 2 | 2011-06-28 |
| Cache memory system, and control method therefor Grant 7,953,935 - Okabayashi , et al. May 31, 2 | 2011-05-31 |
| Processor executing SIMD instructions Grant 7,594,099 - Tanaka , et al. September 22, 2 | 2009-09-22 |
| Cache memory and control method thereof Grant 7,555,610 - Okabayashi , et al. June 30, 2 | 2009-06-30 |
| Cache Memory System, And Control Method Therefor App 20090100231 - Okabayashi; Hazuki ; et al. | 2009-04-16 |
| Cache Memory App 20090077318 - Yamamoto; Takao ; et al. | 2009-03-19 |
| N-way set associative cache memory and control method thereof Grant 7,502,887 - Tanaka , et al. March 10, 2 | 2009-03-10 |
| Cache memory and its controlling method Grant 7,454,575 - Nakanishi , et al. November 18, 2 | 2008-11-18 |
| Processor And Compiler For Decoding An Instruction And Executing The Instruction With Conditional Execution Flags App 20080209407 - Okabayashi; Hazuki ; et al. | 2008-08-28 |
| Cache Memory and Control Method Thereof App 20080168232 - Okabayashi; Hazuki ; et al. | 2008-07-10 |
| Processor and compiler for decoding an instruction and executing the decoded instruction with conditional execution flags Grant 7,380,112 - Okabayashi , et al. May 27, 2 | 2008-05-27 |
| Processor executing SIMD instructions App 20080046704 - Tanaka; Tetsuya ; et al. | 2008-02-21 |
| Processor executing SIMD instructions App 20080046688 - Tanaka; Tetsuya ; et al. | 2008-02-21 |
| Processor executing SIMD instructions App 20080046690 - Tanaka; Tetsuya ; et al. | 2008-02-21 |
| Processor executing SIMD instructions App 20080046687 - Tanaka; Tetsuya ; et al. | 2008-02-21 |
| Processor executing SIMD instructions Grant 7,281,117 - Tanaka , et al. October 9, 2 | 2007-10-09 |
| Cache memory and control method thereof App 20070186048 - Nakanishi; Ryuta ; et al. | 2007-08-09 |
| Cache memory and its controlling method App 20070143548 - Nakanishi; Ryuta ; et al. | 2007-06-21 |
| Cache Memory And Control Method Thereof App 20070083718 - Okabayashi; Hazuki | 2007-04-12 |
| Processor executing SIMD instructions Grant 7,185,176 - Tanaka , et al. February 27, 2 | 2007-02-27 |
| Data processing apparatus and compiler apparatus App 20050144420 - Michimoto, Shohei ; et al. | 2005-06-30 |
| Processor and compiler App 20040193859 - Okabayashi, Hazuki ; et al. | 2004-09-30 |
| Processor executing SIMD instructions App 20040078549 - Tanaka, Tetsuya ; et al. | 2004-04-22 |
| Processor executing SIMD instructions App 20040068642 - Tanaka, Tetsuya ; et al. | 2004-04-08 |
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