Oishi; Kanji
Patent Applications and Registrations
Patent applications and USPTO patent grants for Oishi; Kanji.The latest application filed is for "semiconductor memory device having count value control circuit".
Company Profile
1.39.25
- Oishi; Kanji - Tokyo JP
- Oishi; Kanji - Koganei JP
Patent Activity
| Patent | Date |
|---|---|
| Semiconductor Memory Device Having Count Value Control Circuit App 20160078911 - Fujiwara; Takayuki ; et al. | 2016-03-17 |
| Semiconductor Device App 20150069519 - Aoki; Mamoru ; et al. | 2015-03-12 |
| Voltage level shift circuit and semiconductor device Grant 8,436,655 - Kurita , et al. May 7, 2 | 2013-05-07 |
| Semiconductor device Grant 8,400,855 - Nakagawa , et al. March 19, 2 | 2013-03-19 |
| Semiconductor device Grant 8,130,565 - Sakamoto , et al. March 6, 2 | 2012-03-06 |
| Voltage Level Shift Circuit And Semiconductor Device App 20110298493 - KURITA; Kouhei ; et al. | 2011-12-08 |
| Semiconductor memory device having a double branching bidirectional buffer Grant 8,054,699 - Takahashi , et al. November 8, 2 | 2011-11-08 |
| Semiconductor memory device and method of testing same Grant 7,913,126 - Nakagawa , et al. March 22, 2 | 2011-03-22 |
| Semiconductor Device App 20110044120 - Nakagawa; Hiroshi ; et al. | 2011-02-24 |
| Semiconductor Device App 20100327954 - Sakamoto; Tatsuya ; et al. | 2010-12-30 |
| Semiconductor memory device and operating method thereof Grant 7,859,933 - Yoshida , et al. December 28, 2 | 2010-12-28 |
| Semiconductor memory Grant 7,808,848 - Shibata , et al. October 5, 2 | 2010-10-05 |
| Differential Amplifier Circuit App 20100244960 - TAKITANI; Seisuke ; et al. | 2010-09-30 |
| Duty detection circuit Grant 7,642,829 - Monma , et al. January 5, 2 | 2010-01-05 |
| Semiconductor storage device Grant 7,562,269 - Yoshida , et al. July 14, 2 | 2009-07-14 |
| Semiconductor Memory App 20090168572 - Shibata; Tomoyuki ; et al. | 2009-07-02 |
| Semiconductor memory Grant 7,542,359 - Shibata , et al. June 2, 2 | 2009-06-02 |
| Semiconductor memory device having biderectional buffer App 20090109767 - Takahashi; Susumu ; et al. | 2009-04-30 |
| Command generating circuit and semiconductor memory device having the same Grant 7,492,661 - Yoshida , et al. February 17, 2 | 2009-02-17 |
| Fuse circuit and semiconductor device using fuse circuit thereof Grant 7,436,729 - Yoshida , et al. October 14, 2 | 2008-10-14 |
| Semiconductor memory device and operating method thereof App 20080192558 - Yoshida; Hiroyasu ; et al. | 2008-08-14 |
| Duty detection circuit Grant 7,411,435 - Monma , et al. August 12, 2 | 2008-08-12 |
| Duty detection circuit App 20080129358 - Monma; Atsuko ; et al. | 2008-06-05 |
| Semiconductor memory device and method of testing same App 20080101142 - Nakagawa; Hiroshi ; et al. | 2008-05-01 |
| Semiconductor Memory App 20080062784 - Shibata; Tomoyuki ; et al. | 2008-03-13 |
| Semiconductor memory Grant 7,304,900 - Shibata , et al. December 4, 2 | 2007-12-04 |
| Semiconductor Storage Device App 20070234120 - Yoshida; Hiroyasu ; et al. | 2007-10-04 |
| Prevention of the propagation of jitters in a clock delay circuit Grant 7,276,950 - Monma , et al. October 2, 2 | 2007-10-02 |
| Semiconductor memory device and semiconductor memory device test method Grant 7,274,615 - Nakagawa , et al. September 25, 2 | 2007-09-25 |
| Command generating circuit and semiconductor memory device having the same App 20070159910 - Yoshida; Hiroyasu ; et al. | 2007-07-12 |
| Semiconductor storage device Grant 7,240,253 - Yoshida , et al. July 3, 2 | 2007-07-03 |
| Semiconductor memory device and semiconductor memory device test method App 20060227643 - Nakagawa; Hiroshi ; et al. | 2006-10-12 |
| Semiconductor memory App 20060215478 - Shibata; Tomoyuki ; et al. | 2006-09-28 |
| Duty detection circuit App 20060170475 - Monma; Atsuko ; et al. | 2006-08-03 |
| Semiconductor memory device App 20060104150 - Yoshida; Hiroyasu ; et al. | 2006-05-18 |
| Fuse circuit and semiconductor device using fuse circuit thereof App 20060072364 - Yoshida; Hiroyasu ; et al. | 2006-04-06 |
| Data inversion circuit and semiconductor device Grant 6,999,352 - Yoshida , et al. February 14, 2 | 2006-02-14 |
| Slew rate controlling method and system for output data Grant 6,958,638 - Shibata , et al. October 25, 2 | 2005-10-25 |
| Semiconductor storage device App 20040205429 - Yoshida, Hiroyasu ; et al. | 2004-10-14 |
| Size-reduced majority circuit Grant 6,798,367 - Nakagawa , et al. September 28, 2 | 2004-09-28 |
| Slew rate controlling method and system for output data App 20040105317 - Shibata, Tomoyuki ; et al. | 2004-06-03 |
| Data inversion circuit and semiconductor device App 20040065904 - Yoshida, Hiroyasu ; et al. | 2004-04-08 |
| Semiconductor device Grant 6,717,833 - Kitsukawa , et al. April 6, 2 | 2004-04-06 |
| Semiconductor memory device with less data transfer delay time Grant 6,687,181 - Usuki , et al. February 3, 2 | 2004-02-03 |
| Size-reduced majority circuit App 20030227403 - Nakagawa, Hiroshi ; et al. | 2003-12-11 |
| Semiconductor memory device with less data transfer delay time App 20030043682 - Usuki, Narikazu ; et al. | 2003-03-06 |
| Semiconductor device App 20010000687 - Kitsukawa, Goro ; et al. | 2001-05-03 |
| Semiconductor Integrated circuit device for handling low amplitude signals Grant 5,801,554 - Momma , et al. September 1, 1 | 1998-09-01 |
| Synchronous dynamic memory device capable of operating over wide range of operation frequencies Grant 5,754,838 - Shibata , et al. May 19, 1 | 1998-05-19 |
| Semiconductor memory Grant 5,598,372 - Matsumoto , et al. January 28, 1 | 1997-01-28 |
| Semiconductor memory device for performing parallel operations on hierarchical data lines Grant 5,386,394 - Kawahara , et al. January 31, 1 | 1995-01-31 |
| Multiprocessor cache system having three states for generating invalidating signals upon write accesses Grant 5,283,886 - Nishii , et al. February 1, 1 | 1994-02-01 |
| Static memory containing sense amp and sense amp switching circuit Grant 5,267,198 - Hatano , et al. November 30, 1 | 1993-11-30 |
| Single-chip-cache-buffer for selectively writing write-back and exclusively writing data-block portions to main-memory based upon indication of bits and bit-strings respectively Grant 5,202,969 - Sato , et al. April 13, 1 | 1993-04-13 |
| Static memory containing sense AMP and sense AMP switching circuit Grant 5,193,075 - Hatano , et al. March 9, 1 | 1993-03-09 |
| Single chip cache with partial-write circuit for transferring a preselected portion of data between memory and buffer register Grant 5,146,573 - Sato , et al. September 8, 1 | 1992-09-08 |
| Multi-processing system and cache apparatus for use in the same Grant 5,140,681 - Uchiyama , et al. August 18, 1 | 1992-08-18 |
| Semiconductor integrated circuit device Grant 4,771,406 - Oishi , et al. September 13, 1 | 1988-09-13 |
| Semiconductor memory device having redundancy means Grant 4,727,516 - Yoshida , et al. February 23, 1 | 1988-02-23 |
| Semiconductor integrated circuit device Grant 4,680,737 - Oishi , et al. July 14, 1 | 1987-07-14 |
| Semiconductor memory device having redundancy means Grant 4,656,610 - Yoshida , et al. April 7, 1 | 1987-04-07 |
| MOS memory Grant 4,581,718 - Oishi April 8, 1 | 1986-04-08 |
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