Oi; Tadashi
Patent Applications and Registrations
Patent applications and USPTO patent grants for Oi; Tadashi.The latest application filed is for "device for and method of estimating error point in logic diagram".
- Oi; Tadashi - Tokyo JP
| Patent | Date |
|---|---|
| Device for and method of estimating error point in logic diagram Grant 9,529,042 - Yoshinaga , et al. December 27, 2 | 2016-12-27 |
| Graphical user interface device Grant 9,164,647 - Ueno , et al. October 20, 2 | 2015-10-20 |
| Device For And Method Of Estimating Error Point In Logic Diagram App 20150177322 - Yoshinaga; Mitsunobu ; et al. | 2015-06-25 |
| Logic diagram processing device and logic diagram processing method Grant 9,031,672 - Yoshinaga , et al. May 12, 2 | 2015-05-12 |
| Monitor control system Grant 8,698,616 - Ueno , et al. April 15, 2 | 2014-04-15 |
| Logic Diagram Processing Device And Logic Diagram Processing Method App 20130253667 - YOSHINAGA; Mitsunobu ; et al. | 2013-09-26 |
| On a graphical user interface providing guidance of operations in an industrial plant Grant 8,381,117 - Ueno , et al. February 19, 2 | 2013-02-19 |
| Monitor Control System App 20120161957 - UENO; Yohei ; et al. | 2012-06-28 |
| Graphical User Interface Device App 20120060091 - UENO; Yohei ; et al. | 2012-03-08 |
| Graphical User Interface Device App 20110035693 - Ueno; Yohei ; et al. | 2011-02-10 |
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