loadpatents
name:-0.039170980453491
name:-0.049574851989746
name:-0.00051784515380859
Ogura; Tomoko Patent Filings

Ogura; Tomoko

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ogura; Tomoko.The latest application filed is for "(meth) acrylate resin composition and cured product of same".

Company Profile
0.49.39
  • Ogura; Tomoko - Hillsboro OR
  • Ogura; Tomoko - Hyogo JP
  • Ogura; Tomoko - Wappingers Falls NY
  • Ogura; Tomoko - Hopewell Jct NY
  • Ogura; Tomoko - Fishkill NY
  • Ogura; Tomoko - Hopewell Junction NY
  • Ogura, Tomoko - Hopewell NY
  • Ogura, Tomoko - Junction NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Complementary reference method for high reliability trap-type non-volatile memory
Grant 9,123,419 - Ogura , et al. September 1, 2
2015-09-01
(meth) Acrylate Resin Composition And Cured Product Of Same
App 20140243493 - Ogura; Tomoko ;   et al.
2014-08-28
Twin MONOS Array for High Speed Application
App 20140133244 - Satoh; Kimihiro ;   et al.
2014-05-15
Twin MONOS Array for High Speed Application
App 20140133245 - Satoh; Kimihiro ;   et al.
2014-05-15
Twin MONOS array for high speed application
Grant 8,633,544 - Satoh , et al. January 21, 2
2014-01-21
Complementary Reference Method for High Reliability Trap-Type Non-Volatile Memory
App 20130094303 - Ogura; Nori ;   et al.
2013-04-18
Complementary Reference Method for High Reliability Trap-Type Non-Volatile Memory
App 20130094299 - Ogura; Nori ;   et al.
2013-04-18
Complementary reference method for high reliability trap-type non-volatile memory
Grant 8,325,542 - Ogura , et al. December 4, 2
2012-12-04
High speed operation method for twin MONOS metal bit array
Grant 8,174,885 - Ogura , et al. May 8, 2
2012-05-08
Trap-charge non-volatile switch connector for programmable logic
Grant 8,139,410 - Ogura , et al. March 20, 2
2012-03-20
Trap-charge non-volatile switch connector for programmable logic
Grant 8,089,809 - Ogura , et al. January 3, 2
2012-01-03
Trap-charge non-volatile switch connector for programmable logic
Grant 8,027,198 - Ogura , et al. September 27, 2
2011-09-27
Trap-charge non-volatile switch connector for programmable logic
Grant 8,023,326 - Ogura , et al. September 20, 2
2011-09-20
High speed operation method for Twin MONOS metal bit array
App 20110205798 - Ogura; Tomoko ;   et al.
2011-08-25
High speed operation method for twin MONOS metal bit array
Grant 7,936,604 - Ogura , et al. May 3, 2
2011-05-03
Trap-charge non-volatile switch connector for programmable logic
App 20100261324 - Ogura; Tomoko ;   et al.
2010-10-14
Trap-charge non-volatile switch connector for programmable logic
App 20100259985 - Ogura; Tomoko ;   et al.
2010-10-14
Trap-charge non-volatile switch connector for programmable logic
App 20100259986 - Ogura; Tomoko ;   et al.
2010-10-14
Trap-charge non-volatile switch connector for programmable logic
App 20100259981 - Ogura; Tomoko ;   et al.
2010-10-14
Trap-charge non-volatile switch connector for programmable logic
Grant 7,742,336 - Ogura , et al. June 22, 2
2010-06-22
Complementary Reference method for high reliability trap-type non-volatile memory
App 20100046302 - Ogura; Nori ;   et al.
2010-02-25
Referencing scheme for trap memory
Grant 7,447,077 - Ogura , et al. November 4, 2
2008-11-04
Trap-charge non-volatile switch connector for programmable logic
App 20080101117 - Ogura; Tomoko ;   et al.
2008-05-01
Twin MONOS array for high speed application
Grant 7,352,033 - Satoh , et al. April 1, 2
2008-04-01
Nonvolatile memory array organization and usage
Grant 7,190,603 - Ogura , et al. March 13, 2
2007-03-13
Twin MONOS array for high speed application
App 20070047309 - Satoh; Kimihiro ;   et al.
2007-03-01
High speed operation method for twin MONOS metal bit array
App 20070047307 - Ogura; Tomoko ;   et al.
2007-03-01
Referencing scheme for trap memory
App 20070030745 - Ogura; Tomoko ;   et al.
2007-02-08
Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory
Grant 7,149,126 - Ogura , et al. December 12, 2
2006-12-12
Stitch and select implementation in twin MONOS array
Grant 7,118,961 - Ogura , et al. October 10, 2
2006-10-10
Fast program to program verify method
Grant 7,046,553 - Ogura , et al. May 16, 2
2006-05-16
Non-volatile semiconductor memory and driving method
Grant 7,031,192 - Park , et al. April 18, 2
2006-04-18
Array architecture and operation methods for a nonvolatile memory
Grant 7,006,378 - Saito , et al. February 28, 2
2006-02-28
Method of sense and program verify without a reference cell for non-volatile semiconductor memory
Grant 6,999,345 - Park , et al. February 14, 2
2006-02-14
Twin NAND device structure, array operations and fabrication method
Grant 6,998,658 - Ogura , et al. February 14, 2
2006-02-14
Nonvolatile memory array organization and usage
App 20050248984 - Ogura, Seiki ;   et al.
2005-11-10
High efficiency triple well charge pump circuit
Grant 6,914,791 - Park , et al. July 5, 2
2005-07-05
Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory
App 20050111279 - Ogura, Seiki ;   et al.
2005-05-26
Fast program to program verify method
Grant 6,856,545 - Ogura , et al. February 15, 2
2005-02-15
Twin NAND device structure, array operations and fabrication method
Grant 6,825,084 - Ogura , et al. November 30, 2
2004-11-30
Fast program to program verify method
Grant 6,807,105 - Ogura , et al. October 19, 2
2004-10-19
Stitch and select implementation in twin MONOS array
App 20040166630 - Ogura, Tomoko ;   et al.
2004-08-26
Stitch and select implementation in twin MONOS array
Grant 6,759,290 - Ogura , et al. July 6, 2
2004-07-06
Twin NAND device structure, array operations and fabrication method
App 20040092066 - Ogura, Seiki ;   et al.
2004-05-13
Twin NAND device structure, array operations and fabrication method
App 20040087087 - Ogura, Seiki ;   et al.
2004-05-06
Process for making and programming and operating a dual-bit multi-level ballistic flash memory
Grant 6,714,456 - Ogura , et al. March 30, 2
2004-03-30
Dual-bit multi-level ballistic MONOS memory
Grant 6,686,632 - Ogura , et al. February 3, 2
2004-02-03
Twin NAND device structure, array operations and fabrication method
Grant 6,670,240 - Ogura , et al. December 30, 2
2003-12-30
Bit line decoding scheme and circuit for dual bit memory with a dual bit selection
Grant 6,643,172 - Ogura November 4, 2
2003-11-04
Fast program to program verify method
Grant 6,636,439 - Ogura , et al. October 21, 2
2003-10-21
Control gate decoder for twin MONOS memory with two bit erase capability
Grant 6,636,438 - Ogura , et al. October 21, 2
2003-10-21
Twin MONOS array metal bit organization and single cell operation
Grant 6,631,088 - Ogura , et al. October 7, 2
2003-10-07
Bit line decoding scheme and circuit for dual bit memory array
Grant 6,631,089 - Ogura , et al. October 7, 2
2003-10-07
Fast program to program verify method
App 20030185053 - Ogura, Seiki ;   et al.
2003-10-02
Fast program to program verify method
Grant 6,628,547 - Ogura , et al. September 30, 2
2003-09-30
Fast program to program verify method
Grant 6,628,546 - Ogura , et al. September 30, 2
2003-09-30
Fast program to program verify method
Grant 6,611,461 - Ogura , et al. August 26, 2
2003-08-26
Fast program to program verify method
App 20030128588 - Ogura, Seiki ;   et al.
2003-07-10
Fast program to program verify method
App 20030123291 - Ogura, Seiki ;   et al.
2003-07-03
Fast program to program verify method
App 20030123308 - Ogura, Seiki ;   et al.
2003-07-03
Fast program to program verify method
App 20030123292 - Ogura, Seiki ;   et al.
2003-07-03
Fast program to program verify method
App 20030123290 - Ogura, Seiki ;   et al.
2003-07-03
Fast program to program verify method
App 20030123293 - Ogura, Seiki ;   et al.
2003-07-03
Data programming implementation for high efficiency CHE injection
Grant 6,567,314 - Ogura , et al. May 20, 2
2003-05-20
Control gate decoder for twin MONOS memory with two bit erase capability
App 20030079540 - Ogura, Tomoko
2003-05-01
Fast program to program verify method
Grant 6,549,463 - Ogura , et al. April 15, 2
2003-04-15
Wordline decoder for flash memory
Grant 6,535,430 - Ogura , et al. March 18, 2
2003-03-18
Bit line decoding scheme and circuit for dual bit memory with a dual bit selection
App 20030031048 - Ogura, Tomoko
2003-02-13
Twin NAND device structure, array operations and fabrication method
App 20030032243 - Ogura, Seiki ;   et al.
2003-02-13
Twin MONOS array metal bit organization and single cell operation
App 20030022441 - Ogura, Seiki ;   et al.
2003-01-30
Usage of word voltage assistance in twin MONOS cell during program and erase
Grant 6,477,088 - Ogura , et al. November 5, 2
2002-11-05
Process for making and programming and operating a dual-bit multi-level ballistic flash memory
App 20020145914 - Ogura, Seiki ;   et al.
2002-10-10
Process for making and programming and operating a dual-bit multi-level ballistic flash memory
App 20020145915 - Ogura, Seiki ;   et al.
2002-10-10
Twin MONOS memory cell usage for wide program
Grant 6,459,622 - Ogura , et al. October 1, 2
2002-10-01
Twin Monos Memory Cell Usage For Wide Program
App 20020131304 - Ogura, Seiki ;   et al.
2002-09-19
Fast program to program verify method
App 20020075725 - Ogura, Seiki ;   et al.
2002-06-20
Usage of word voltage assistance in twin MONOS cell during program and erase
App 20020067641 - Ogura, Seiki ;   et al.
2002-06-06
Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory
App 20020045319 - Ogura, Seiki ;   et al.
2002-04-18
Process for making and programming and operating a dual-bit multi-level ballistic flash memory
Grant 6,366,500 - Ogura , et al. April 2, 2
2002-04-02
Process for making and programming and operating a dual-bit multi-level ballistic flash memory
Grant 6,359,807 - Ogura , et al. March 19, 2
2002-03-19
Wordline decoder for flash memory
App 20010053093 - Ogura, Tomoko ;   et al.
2001-12-20
Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory
Grant 6,248,633 - Ogura , et al. June 19, 2
2001-06-19
Integration method for sidewall split gate monos transistor
Grant 6,177,318 - Ogura , et al. January 23, 2
2001-01-23
Process for making and programming and operating a dual-bit multi-level ballistic flash memory
Grant 6,133,098 - Ogura , et al. October 17, 2
2000-10-17
Read reference scheme for flash memory
Grant 6,038,169 - Ogura , et al. March 14, 2
2000-03-14
Fast, low current program with auto-program for flash memory
Grant 6,002,611 - Ogura , et al. December 14, 1
1999-12-14

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