Ogilvie; Clarence Rosser

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ogilvie; Clarence Rosser.The latest application filed is for "measurement of power consumption within an integrated circuit".

Company Profile

0.20.15

Ogilvie; Clarence Rosser - Huntington VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structure for hardware assisted bus state transition circuit using content addressable memories Grant 8,347,019 - Bueti , et al. January 1, 2	2013-01-01
Method and architecture for power management of an electronic device Grant 7,831,935 - Bernstein , et al. November 9, 2	2010-11-09
Asynchronous interface methods and apparatus Grant 7,787,577 - Gundurao , et al. August 31, 2	2010-08-31
Computer system bus bridge Grant 7,757,032 - Biran , et al. July 13, 2	2010-07-13
Design structure for measurement of power consumption within an integrated circuit Grant 7,715,995 - Goodnow , et al. May 11, 2	2010-05-11
Design Structure For Measurement Of Power Consumption Within An Integrated Circuit App 20090153324 - Goodnow; Kenneth Joseph ; et al.	2009-06-18
Measurement Of Power Consumption Within An Integrated Circuit App 20090157334 - Goodnow; Kenneth Joseph ; et al.	2009-06-18
Method and apparatus for transmitting data in an integrated circuit Grant 7,536,496 - Harding , et al. May 19, 2	2009-05-19
System for expanding a window of valid data Grant 7,529,962 - Berhanu , et al. May 5, 2	2009-05-05
Compensation of process and voltage variability in multi-threshold dynamic voltage scaling circuits Grant 7,525,373 - Ogilvie , et al. April 28, 2	2009-04-28
Design structure for facilitating engineering changes in integrated circuits Grant 7,480,888 - Ogilvie , et al. January 20, 2	2009-01-20
Computer system bus bridge Grant 7,469,312 - Biran , et al. December 23, 2	2008-12-23
Computer System Bus Bridge App 20080307147 - Biran; Giora ; et al.	2008-12-11
Method and architecture for power management of an electronic device Grant 7,454,642 - Bernstein , et al. November 18, 2	2008-11-18
Design Structure For Hardware Assisted Bus State Transition Circuit Using Content Addressable Memories App 20080282015 - Bueti; Serafino ; et al.	2008-11-13
Design Structure for Transmitting Data in an Integrated Circuit App 20080276034 - Harding; W. Riyon ; et al.	2008-11-06
Hardware Assisted Bus State Transition Using Content Addressable Memories. App 20080183941 - Bueti; Serafino ; et al.	2008-07-31
Transaction flow control mechanism for a bus bridge Grant 7,330,925 - Ogilvie , et al. February 12, 2	2008-02-12
Method And Architecture For Power Management Of An Electronic Device App 20080024197 - Bernstein; Kerry ; et al.	2008-01-31
Method for providing bounded latency in a real-time data processing system Grant 7,289,444 - Ogilvie October 30, 2	2007-10-30
Method And Architecture For Power Management Of An Electronic Device App 20070228830 - Bernstein; Kerry ; et al.	2007-10-04
Pipeline bit handling circuit and method for a bus bridge Grant 7,275,125 - Drehmel , et al. September 25, 2	2007-09-25
A Method And Apparatus For Transmitting Data In An Integrated Circuit App 20070204094 - Harding; W. Riyon ; et al.	2007-08-30
Computer system architecture for a processor connected to a high speed bus transceiver Grant 7,234,017 - Biran , et al. June 19, 2	2007-06-19
Pipeline bit handling circuit and method for a bus bridge App 20060190667 - Drehmel; Robert Allen ; et al.	2006-08-24
Computer system bus bridge App 20060190659 - Biran; Giora ; et al.	2006-08-24
Transaction flow control mechanism for a bus bridge App 20060190662 - Ogilvie; Clarence Rosser ; et al.	2006-08-24
Apparatus and method for transaction tag mapping between bus domains App 20060190655 - Kautzman; Mark E. ; et al.	2006-08-24
Computer system architecture App 20060190668 - Biran; Giora ; et al.	2006-08-24
Method For Providing Bounded Latency In A Real-time Data Processing System App 20040208124 - Ogilvie, Clarence Rosser	2004-10-21
System and method for prefetching data Grant 6,260,116 - Davis , et al. July 10, 2	2001-07-10
Real time invariant behavior cache Grant 6,157,981 - Blaner , et al. December 5, 2	2000-12-05
Computer system generating a processor interrupt in response to receiving an interrupt/data synchronizing signal over a data bus Grant 6,038,629 - Ogilvie , et al. March 14, 2	2000-03-14
Anticipating cache memory loader and method Grant 6,026,471 - Goodnow , et al. February 15, 2	2000-02-15
Computer system generating a processor interrupt in response to receiving an interrupt/data synchronizing signal over a data bus Grant 5,854,908 - Ogilvie , et al. December 29, 1	1998-12-29

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