loadpatents
name:-0.043796062469482
name:-0.061244010925293
name:-0.40117907524109
Odanaka; Shinji Patent Filings

Odanaka; Shinji

Patent Applications and Registrations

Patent applications and USPTO patent grants for Odanaka; Shinji.The latest application filed is for "method for forming lsi pattern".

Company Profile
0.37.15
  • Odanaka; Shinji - Osaka JP
  • Odanaka; Shinji - Hirakata JP
  • Odanaka; Shinji - Sakai JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Changing a design rule for forming LSI pattern based on evaluating effectiveness of optical proximity corrected patterns
Grant 8,095,894 - Misaka , et al. January 10, 2
2012-01-10
Method for forming LSI pattern
App 20090019419 - Misaka; Akio ;   et al.
2009-01-15
Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI
Grant 7,404,165 - Misaka , et al. July 22, 2
2008-07-22
Semiconductor device and method for fabricating the same
App 20060202287 - Noda; Taiji ;   et al.
2006-09-14
Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI
Grant 7,103,870 - Misaka , et al. September 5, 2
2006-09-05
Method for fabricating a semiconductor device having a pocket dopant diffused layer
Grant 7,091,093 - Noda , et al. August 15, 2
2006-08-15
Nonvolatile semiconductor memory device and method for fabricating the same
Grant 6,982,456 - Sugiyama , et al. January 3, 2
2006-01-03
Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI
App 20050289500 - Misaka, Akio ;   et al.
2005-12-29
Semiconductor device and method of fabricating the same
Grant 6,921,933 - Umimoto , et al. July 26, 2
2005-07-26
Nonvolatile semiconductor memory device and method for fabricating the same
App 20040246803 - Sugiyama, Nobuyo ;   et al.
2004-12-09
Nonvolatile semiconductor memory device and method for fabricating the same
Grant 6,828,621 - Kusumi , et al. December 7, 2
2004-12-07
Nonvolatile semiconductor memory device which can operate at high speed with low voltage, and manufacturing method there
Grant 6,803,623 - Sugiyama , et al. October 12, 2
2004-10-12
Nonvolatile semiconductor memory device and method for fabricating the same
Grant 6,784,040 - Kusumi , et al. August 31, 2
2004-08-31
Nonvolatile semiconductor memory device and method for fabricating the same
Grant 6,770,931 - Sugiyama , et al. August 3, 2
2004-08-03
Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI
App 20040107410 - Misaka, Akio ;   et al.
2004-06-03
Semiconductor device and method of fabricating the same
App 20040099890 - Umimoto, Hiroyuki ;   et al.
2004-05-27
Nonvolatile semiconductor memory device and method for fabricating the same
App 20040071024 - Kusumi, Masataka ;   et al.
2004-04-15
Method for planning layout for LSI pattern, method for forming LSI pattern and method for generating mask data for LSI
Grant 6,691,297 - Misaka , et al. February 10, 2
2004-02-10
Semiconductor device and method of fabricating the same
Grant 6,667,216 - Umimoto , et al. December 23, 2
2003-12-23
Nonvolatile semiconductor memory device and method for fabricating the same
Grant 6,642,572 - Kusumi , et al. November 4, 2
2003-11-04
Nonvolatile semiconductor memory device and method for fabricating the same
App 20030173616 - Kusumi, Masataka ;   et al.
2003-09-18
Nonvolatile semiconductor memory device and method for fabricating the same
App 20030141540 - Kusumi, Masataka ;   et al.
2003-07-31
Nonvolatile semiconductor memory device and method for fabricating the same
App 20030122180 - Sugiyama, Nobuyo ;   et al.
2003-07-03
Nonvolatile semiconductor memory device and method for fabricating the same
Grant 6,545,312 - Kusumi , et al. April 8, 2
2003-04-08
Method for fabricating semiconductor device
Grant 6,432,802 - Noda , et al. August 13, 2
2002-08-13
Nonvolatile semiconductor memory device and manufacturing method thereof
App 20020074583 - Sugiyama, Nobuyo ;   et al.
2002-06-20
Nonvolatile semiconductor memory device and method for fabricating the same
App 20020070405 - Sugiyama, Nobuyo ;   et al.
2002-06-13
Nonvolatile semiconductor device capable of increased electron injection efficiency
Grant 6,380,585 - Odanaka , et al. April 30, 2
2002-04-30
Nonvolatile semiconductor memory device and method for fabricating the same
App 20020039822 - Kusumi, Masataka ;   et al.
2002-04-04
Semiconductor device and method of fabricating the same
App 20020034865 - Umimoto, Hiroyuki ;   et al.
2002-03-21
Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device
Grant 6,358,799 - Odanaka , et al. March 19, 2
2002-03-19
Method of forming MOSFET with channel, extension and pocket implants
Grant 6,333,217 - Umimoto , et al. December 25, 2
2001-12-25
Method for manufacturing semiconductor device
Grant 6,312,981 - Akamatsu , et al. November 6, 2
2001-11-06
Method for manufacturing semiconductor device
Grant 6,251,718 - Akamatsu , et al. June 26, 2
2001-06-26
Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device
App 20010001295 - Odanaka, Shinji ;   et al.
2001-05-17
Semiconductor device and method for fabricating the same
Grant 6,147,379 - Hori , et al. November 14, 2
2000-11-14
Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit
Grant 6,121,655 - Odanaka , et al. September 19, 2
2000-09-19
Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit
Grant 6,051,860 - Odanaka , et al. April 18, 2
2000-04-18
MOS type semiconductor device having an impurity diffusion layer with a nonuniform impurity concentration profile in a channel region
Grant 6,031,272 - Hiroki , et al. February 29, 2
2000-02-29
Complementary semiconductor device and method for producing the same
Grant 6,031,268 - Hiroki , et al. February 29, 2
2000-02-29
Method for forming complementary MOS device having asymmetric region in channel region
Grant 5,830,788 - Hiroki , et al. November 3, 1
1998-11-03
MIS transistor with gate sidewall insulating layer
Grant 5,808,347 - Kurimoto , et al. September 15, 1
1998-09-15
Semiconductor device and process
Grant 5,633,211 - Imai , et al. May 27, 1
1997-05-27
Semiconductor device having reduced gate overlapping capacitance
Grant 5,610,430 - Yamashita , et al. March 11, 1
1997-03-11
MOS transistor and its fabricating method
Grant 5,518,944 - Hiroki , et al. May 21, 1
1996-05-21
Semiconductor device for protecting an internal circuit from electrostatic damage
Grant 5,514,893 - Miyanaga , et al. May 7, 1
1996-05-07
MOS type semiconductor device having a low concentration impurity diffusion region
Grant 5,512,771 - Hiroki , et al. April 30, 1
1996-04-30
LDD FET with polysilicon sidewalls
Grant 5,386,133 - Hiroki , et al. January 31, 1
1995-01-31
Quantum device and fabrication method thereof
Grant 5,296,719 - Hirai , et al. March 22, 1
1994-03-22
Method of manufacture for semiconductor device by forming deep and shallow regions
Grant 5,292,671 - Odanaka March 8, 1
1994-03-08
Method of proudcing a MIS transistor
Grant 5,221,632 - Kurimoto , et al. June 22, 1
1993-06-22
Method of making a trench capacitor dram cell
Grant 5,026,658 - Fuse , et al. June 25, 1
1991-06-25

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed