loadpatents
name:-0.00038695335388184
name:-0.017564058303833
name:-0.00045680999755859
Odaka; Masanori Patent Filings

Odaka; Masanori

Patent Applications and Registrations

Patent applications and USPTO patent grants for Odaka; Masanori.The latest application filed is for "bit-line drive circuit for a semiconductor memory".

Company Profile
0.15.0
  • Odaka; Masanori - Kodaira JP
  • Odaka; Masanori - Fuchu JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Bit-line drive circuit for a semiconductor memory
Grant 5,398,201 - Nambu , et al. March 14, 1
1995-03-14
Method of manufacturing semiconductor integrated circuit device
Grant 5,354,699 - Ikeda , et al. October 11, 1
1994-10-11
Semiconductor integrated circuit device
Grant 5,291,445 - Miyaoka , et al. March 1, 1
1994-03-01
Semiconductor integrated circuit device forming on a common substrate MISFETs isolated by a field oxide and bipolar transistors isolated by a groove
Grant 5,214,302 - Uchida , et al. May 25, 1
1993-05-25
Semiconductor memory device
Grant 5,140,550 - Miyaoka , et al. * August 18, 1
1992-08-18
Semiconductor integrated circuit device
Grant 5,057,894 - Ikeda , et al. October 15, 1
1991-10-15
Memory device with improved common data line bias arrangement
Grant 5,050,127 - Mitsumoto , et al. * September 17, 1
1991-09-17
Semiconductor memory device with dual selection circuitry including CMOS and bipolar transistors
Grant 4,961,164 - Miyaoka , et al. October 2, 1
1990-10-02
Semiconductor integrated circuit device double isolated CMOS input protection resistor
Grant 4,903,093 - Ide , et al. February 20, 1
1990-02-20
Semiconductor integrated circuit device
Grant 4,879,681 - Miwa , et al. November 7, 1
1989-11-07
Semiconductor integrated circuit
Grant 4,858,189 - Ogiue , et al. August 15, 1
1989-08-15
Memory device with improved common data line bias arrangement
Grant 4,829,479 - Mitsumoto , et al. May 9, 1
1989-05-09
MOS/bipolar device with stepped buried layer under active regions
Grant 4,799,098 - Ikeda , et al. January 17, 1
1989-01-17
Semiconductor integrated circuit
Grant 4,713,796 - Ogiue , et al. December 15, 1
1987-12-15
Method of making semiconductor integrated circuit device
Grant 4,219,369 - Ogiue , et al. August 26, 1
1980-08-26

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