Oakland; Steven F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Oakland; Steven F..The latest application filed is for "circuit for detecting structural defects in an integrated circuit chip, methods of use and manufacture and design structures".

Company Profile

0.38.34

Oakland; Steven F. - Colchester VT
Oakland; Steven F. - Essex Junction VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Circuit for detecting structural defects in an integrated circuit chip, methods of use and manufacture and design structures Grant 9,599,664 - Lacroix , et al. March 21, 2	2017-03-21
Verifying partial good voltage island structures Grant 9,172,373 - Gorman , et al. October 27, 2	2015-10-27
Circuit For Detecting Structural Defects In An Integrated Circuit Chip, Methods Of Use And Manufacture And Design Structures App 20150247896 - Lacroix; Luke D. ; et al.	2015-09-03
Circuit for detecting structural defects in an integrated circuit chip, methods of use and manufacture and design structures Grant 9,057,760 - Lacroix , et al. June 16, 2	2015-06-16
Verifying Partial Good Voltage Island Structures App 20150070048 - GORMAN; Kevin W. ; et al.	2015-03-12
Microcontroller for logic built-in self test (LBIST) Grant 8,423,847 - Grise , et al. April 16, 2	2013-04-16
Dense register array for enabling scan out observation of both L1 and L2 latches Grant 8,423,844 - Gillis , et al. April 16, 2	2013-04-16
Microcontroller For Logic Built-in Self Test (lbist) App 20120221910 - GRISE; Gary D. ; et al.	2012-08-30
Circuit For Detecting Structural Defects In An Integrated Circuit Chip, Methods Of Use And Manufacture And Design Structures App 20120187953 - LACROIX; Luke D. ; et al.	2012-07-26
Method to test hold path faults using functional clocking Grant 8,230,283 - Gillis , et al. July 24, 2	2012-07-24
Dense Register Array For Enabling Scan Out Observation Of Both L1 And L2 Latches App 20120179944 - Gillis; Pamela S. ; et al.	2012-07-12
Microcontroller for logic built-in self test (LBIST) Grant 8,205,124 - Grise , et al. June 19, 2	2012-06-19
Hold transition fault model and test generation method Grant 8,181,135 - Iyengar , et al. May 15, 2	2012-05-15
Method To Test Hold Path Faults Using Functional Clocking App 20110154141 - Gillis; Pamela S. ; et al.	2011-06-23
Hold Transition Fault Model and Test Generation Method App 20110055650 - Iyengar; Vikram ; et al.	2011-03-03
Functional frequency testing of integrated circuits Grant 7,840,864 - Grise , et al. November 23, 2	2010-11-23
Functional frequency testing of integrated circuits Grant 7,840,863 - Grise , et al. November 23, 2	2010-11-23
System and methods of balancing scan chains and inserting the balanced-length scan chains into hierarchically designed integrated circuits Grant 7,823,035 - Litten , et al. October 26, 2	2010-10-26
Functional frequency testing of integrated circuits Grant 7,698,611 - Grise , et al. April 13, 2	2010-04-13
Functional Frequency Testing Of Integrated Circuits App 20100088562 - Grise; Gary D. ; et al.	2010-04-08
Functional Frequency Testing Of Integrated Circuits App 20100088561 - Grise; Gary D. ; et al.	2010-04-08
Latch and clock structures for enabling race-reduced MUX scan and LSSD co-compatibility Grant 7,560,964 - Lackey , et al. July 14, 2	2009-07-14
Microcontroller For Logic Built-in Self Test (lbist) App 20090055696 - Grise; Gary D. ; et al.	2009-02-26
Microcontroller for logic built-in self test (LBIST) Grant 7,490,280 - Grise , et al. February 10, 2	2009-02-10
Latch and clock structures for enabling race-reduced mux scan and LSSD co-compatibility Grant 7,482,851 - Lackey , et al. January 27, 2	2009-01-27
Design structure for in-system redundant array repair in integrated circuits Grant 7,457,187 - Bright , et al. November 25, 2	2008-11-25
Clock generator having improved deskewer Grant 7,456,674 - Oakland November 25, 2	2008-11-25
Testing Using Independently Controllable Voltage Islands App 20080284459 - Gattiker; Anne E. ; et al.	2008-11-20
System And Methods Of Balancing Scan Chains And Inserting The Balanced-length Scan Chains Into Hierarchically Designed Integrated Circuits. App 20080288841 - Litten; David D. ; et al.	2008-11-20
Compilable Memory Structure And Test Methodology For Both Asic And Foundry Test Environments App 20080256405 - Eustis; Steven M. ; et al.	2008-10-16
Testing using independently controllable voltage islands Grant 7,428,675 - Gattiker , et al. September 23, 2	2008-09-23
Method and apparatus for in-system redundant array repair on integrated circuits Grant 7,405,990 - Bright , et al. July 29, 2	2008-07-29
Compilable memory structure and test methodology for both ASIC and foundry test environments Grant 7,404,125 - Eustis , et al. July 22, 2	2008-07-22
Method and apparatus for in-system redundant array repair on integrated circuits Grant 7,397,709 - Bright , et al. July 8, 2	2008-07-08
Programmable Locking Mechanism For Secure Applications In An Integrated Circuit App 20080155151 - Fifield; John A. ; et al.	2008-06-26
Clock Generator Having Improved Deskewer App 20080122515 - Oakland; Steven F.	2008-05-29
Method And Apparatus For In-system Redundant Array Repair On Integrated Circuits App 20080080274 - Bright; Arthur A. ; et al.	2008-04-03
Design Structure For In-system Redundant Array Repair In Integrated Circuits App 20080062783 - BRIGHT; Arthur A. ; et al.	2008-03-13
Latch And Clock Structures For Enabling Race-reduced Mux Scan And Lssd Co-compatibility App 20080042712 - LACKEY; David E. ; et al.	2008-02-21
Method And Apparatus For In-system Redundant Array Repair On Integrated Circuits App 20080037350 - Bright; Arthur A. ; et al.	2008-02-14
Scan Chain Circuitry That Enables Scan Testing At Functional Clock Speed App 20080005634 - Grise; Gary D. ; et al.	2008-01-03
Method and apparatus for in-system redundant array repair on integrated circuits Grant 7,310,278 - Bright , et al. December 18, 2	2007-12-18
Functional Frequency Testing Of Integrated Circuits App 20070283201 - Grise; Gary D. ; et al.	2007-12-06
Method And Apparatus For In-system Redundant Array Repair On Integrated Circuits App 20070258296 - Bright; Arthur A. ; et al.	2007-11-08
Functional frequency testing of integrated circuits Grant 7,290,191 - Grise , et al. October 30, 2	2007-10-30
Access method for embedded JTAG TAP controller instruction registers Grant 7,284,172 - Grupp , et al. October 16, 2	2007-10-16
Method and circuit using boundary scan cells for design library analysis Grant 7,281,182 - Gillis , et al. October 9, 2	2007-10-09
Clock Generator Having Improved Deskewer App 20070200597 - Oakland; Steven F.	2007-08-30
Microcontroller For Logic Built-in Self Test (lbist) App 20070204193 - Grise; Gary D. ; et al.	2007-08-30
Method for separating shift and scan paths on scan-only, single port LSSD latches Grant 7,243,279 - Anand , et al. July 10, 2	2007-07-10
Clock Control Circuit For Test That Facilitates An At Speed Structural Test App 20060248417 - Farmer; Henry R. ; et al.	2006-11-02
Latch and clock structures for enabling race-reduced MUX scan and LSSD co-compatibility App 20060208783 - Lackey; David E. ; et al.	2006-09-21
Method And Circuit Using Boundary Scan Cells For Design Library Analysis App 20060190784 - Gillis; Pamela S. ; et al.	2006-08-24
Compilable Memory Structure And Test Methodology For Both Asic And Foundry Test Environments App 20060176745 - Eustis; Steven M. ; et al.	2006-08-10
Method for reduced electrical fusing time Grant 7,089,136 - Anand , et al. August 8, 2	2006-08-08
Testing using independently controllable voltage islands App 20060158222 - Gattiker; Anne ; et al.	2006-07-20
Functional Frequency Testing Of Integrated Circuits App 20060041802 - Grise; Gary D. ; et al.	2006-02-23
Access Method For Embedded Jtag Tap Controller Instruction Registers App 20050257108 - Grupp, Richard J. ; et al.	2005-11-17
High performance state saving circuit Grant 6,927,614 - Oakland , et al. August 9, 2	2005-08-09
High Preformance State Saving Circuit App 20050088213 - Oakland, Steven F. ; et al.	2005-04-28
Pipeline array Grant 6,856,270 - Farmer , et al. February 15, 2	2005-02-15
Method of electrically blowing fuses under control of an on-chip tester interface apparatus Grant 6,768,694 - Anand , et al. July 27, 2	2004-07-27
Method Of Electrically Blowing Fuses Under Control Of An On-chip Tester Interface Apparatus App 20040066695 - Anand, Darren L. ; et al.	2004-04-08
Self test method and device for dynamic voltage screen functionality improvement Grant 6,656,751 - Andersen , et al. December 2, 2	2003-12-02
Self test method and device for dynamic voltage screen functionality improvement App 20030090295 - Andersen, John E. ; et al.	2003-05-15
Low power LSSD flip flops and a flushable single clock splitter for flip flops Grant 6,304,122 - Gregor , et al. October 16, 2	2001-10-16
Serial input shift register built-in self test circuit for embedded circuits Grant 5,825,785 - Barry , et al. October 20, 1	1998-10-20
Low power, high performance PLA Grant 5,311,079 - Ditlow , et al. May 10, 1	1994-05-10
Clock signal latency elimination network Grant 5,272,729 - Bechade , et al. December 21, 1	1993-12-21

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