Patent applications and USPTO patent grants for O'Neill; Jay.The latest application filed is for "apparatuses, methods, and systems for vector processor architecture having an array of identical circuit blocks".
Patent | Date |
---|---|
Apparatuses, methods, and systems for vector processor architecture having an array of identical circuit blocks Grant 11,074,213 - Williams , et al. July 27, 2 | 2021-07-27 |
Apparatuses, Methods, And Systems For Vector Processor Architecture Having An Array Of Identical Circuit Blocks App 20200409903 - Williams; Joseph ;   et al. | 2020-12-31 |
Multi-channel serdes receiver for chip-to-chip and backplane interconnects and method of operation thereof Grant 7,426,247 - Yang , et al. September 16, 2 | 2008-09-16 |
Multi-channel Serdes Receiver For Chip-to-chip And Backplane Interconnects And Method Of Operation Thereof App 20070092039 - Yang; Fuji ;   et al. | 2007-04-26 |
Multi-channel serdes receiver for chip-to-chip and backplane interconnects and method of operation thereof Grant 7,158,587 - Yang , et al. January 2, 2 | 2007-01-02 |
Multi-channel serdes receiver for chip-to-chip and backplane interconnects and method of operation thereof App 20030053565 - Yang, Fuji ;   et al. | 2003-03-20 |
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