NYHUS; Paul A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for NYHUS; Paul A..The latest application filed is for "advanced lithography and self-assembled devices".

Company Profile

21.34.47

NYHUS; Paul A. - Portland OR
NYHUS; Paul A - Portland OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Advanced Lithography And Self-assembled Devices App 20220262722 - SCHENKER; Richard E. ; et al.	2022-08-18
Conductive cap-based approaches for conductive via fabrication and structures resulting therefrom Grant 11,417,567 - Gstrein , et al. August 16, 2	2022-08-16
Advanced lithography and self-assembled devices Grant 11,373,950 - Schenker , et al. June 28, 2	2022-06-28
Colored Gratings In Microelectronic Structures App 20220199420 - Singh; Gurpreet ; et al.	2022-06-23
Vertical Metal Splitting Using Helmets And Wrap-around Dielectric Spacers App 20220157708 - Guler; Leonard P. ; et al.	2022-05-19
Gate Spacing In Integrated Circuit Structures App 20220102148 - Wallace; Charles Henry ; et al.	2022-03-31
Contact Over Active Gate Structures Using Directed Self-assembly For Advanced Integrated Circuit Structure Fabrication App 20220102210 - NYHUS; Paul A. ; et al.	2022-03-31
Via & Plug Architectures For Integrated Circuit Interconnects & Methods Of Manufacture App 20210313222 - Guler; Leonard P. ; et al.	2021-10-07
Self-aligned via and plug patterning for back end of line (BEOL) interconnects Grant 10,991,599 - Wallace , et al. April 27, 2	2021-04-27
Contact Over Active Gate Structures With Metal Oxide Layers To Inhibit Shorting App 20210090990 - HOURANI; Rami ; et al.	2021-03-25
Advanced Lithography And Self-assembled Devices App 20210082800 - SCHENKER; Richard E. ; et al.	2021-03-18
Advanced lithography and self-assembled devices Grant 10,892,223 - Schenker , et al. January 12, 2	2021-01-12
Materials And Layout Design Options For Dsa On Transition Regions Over Active Die App 20200411501 - SINGH; Gurpreet ; et al.	2020-12-31
Vertical Edge Blocking (veb) Technique For Increasing Patterning Process Margin App 20200388530 - GULER; Leonard P. ; et al.	2020-12-10
Metal via processing schemes with via critical dimension (CD) control for back end of line (BEOL) interconnects and the resulting structures Grant 10,636,700 - Nyhus , et al.	2020-04-28
Self-aligned isotropic etch of pre-formed vias and plugs for back end of line (BEOL) interconnects Grant 10,600,678 - Wallace , et al.	2020-03-24
Advanced Lithography And Self-assembled Devices App 20200066629 - SCHENKER; Richard E. ; et al.	2020-02-27
Pitch division patterning approaches with increased overlay margin for back end of line (BEOL) interconnect fabrication and structures resulting therefrom Grant 10,559,529 - Wallace , et al. Feb	2020-02-11
Guard Ring Structure For An Integrated Circuit App 20190393170 - Nyhus; Paul A. ; et al.	2019-12-26
Conductive Cap-based Approaches For Conductive Via Fabrication And Structures Resulting Therefrom App 20190363008 - GSTREIN; Florian ; et al.	2019-11-28
Exposure activated chemically amplified directed self-assembly (DSA) for back end of line (BEOL) pattern cutting and plugging Grant 10,459,338 - Nyhus , et al. Oc	2019-10-29
Metal Via Processing Schemes With Via Critical Dimension (cd) Control For Back End Of Line (beol) Interconnects And The Resultin App 20190259656 - NYHUS; Paul A. ; et al.	2019-08-22
Self-aligned Via And Plug Patterning For Back End Of Line (beol) Interconnects App 20190252208 - WALLACE; Charles H. ; et al.	2019-08-15
Underlying absorbing or conducting layer for Ebeam direct write (EBDW) lithography Grant 10,338,474 - Tandon , et al.	2019-07-02
Patterning of vertical nanowire transistor channel and gate with directed self assembly Grant 10,325,814 - Nyhus , et al.	2019-06-18
Metal via processing schemes with via critical dimension (CD) control for back end of line (BEOL) interconnects and the resulting structures Grant 10,319,625 - Nyhus , et al.	2019-06-11
Self-aligned via and plug patterning for back end of line (BEOL) interconnects Grant 10,297,467 - Wallace , et al.	2019-05-21
Self-aligned Isotropic Etch Of Pre-formed Vias And Plugs For Back End Of Line (beol) Interconnects App 20190148220 - WALLACE; Charles H. ; et al.	2019-05-16
Self-aligned isotropic etch of pre-formed vias and plugs for back end of line (BEOL) interconnects Grant 10,211,088 - Wallace , et al. Feb	2019-02-19
Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects Grant 10,204,830 - Wallace , et al. Feb	2019-02-12
Pitch Division Patterning Approaches With Increased Overlay Margin For Back End Of Line (beol) Interconnect Fabrication And Structures Resulting Therefrom App 20190019748 - WALLACE; Charles H. ; et al.	2019-01-17
Aligned Pitch-quartered Patterning For Lithography Edge Placement Error Advanced Rectification App 20190013246 - WALLACE; Charles H. ; et al.	2019-01-10
Pitch Division Using Directed Self-assembly App 20180323078 - BOJARSKI; Stephanie A. ; et al.	2018-11-08
Metal Via Processing Schemes With Via Critical Dimension (cd) Control For Back End Of Line (beol) Interconnects And The Resulting Structures App 20180323100 - NYHUS; Paul A. ; et al.	2018-11-08
Self-aligned Isotropic Etch Of Pre-formed Vias And Plugs For Back End Of Line (beol) Interconnects App 20180204763 - WALLACE; Charles H. ; et al.	2018-07-19
Previous Layer Self-aligned Via And Plug Patterning For Back End Of Line (beol) Interconnects App 20180033692 - WALLACE; Charles H. ; et al.	2018-02-01
Underlying Absorbing or Conducting Layer for Ebeam Direct Write (EBDW) Lithography App 20170338105 - TANDON; Shakul ; et al.	2017-11-23
Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnects Grant 9,793,159 - Wallace , et al. October 17, 2	2017-10-17
Subtractive self-aligned via and plug patterning for back end of line (BEOL) interconnects Grant 9,793,163 - Bristol , et al. October 17, 2	2017-10-17
Patterning Of Vertical Nanowire Transistor Channel And Gate With Directed Self Assembly App 20170236757 - Nyhus; Paul A. ; et al.	2017-08-17
Self-Aligned Via and Plug Patterning for Back End of Line (BEOL) Interconnects App 20170221810 - WALLACE; Charles H. ; et al.	2017-08-03
Exposure Activated Chemically Amplified Directed Self-assembly (dsa) For Back End Of Line (beol) Pattern Cutting And Plugging App 20170207116 - Nyhus; Paul A. ; et al.	2017-07-20
Self-aligned via and plug patterning for back end of line (BEOL) interconnects Grant 9,666,451 - Wallace , et al. May 30, 2	2017-05-30
Patterning of vertical nanowire transistor channel and gate with directed self assembly Grant 9,653,576 - Nyhus , et al. May 16, 2	2017-05-16
Exposure activated chemically amplified directed self-assembly (DSA) for back end of line (BEOL) pattern cutting and plugging Grant 9,625,815 - Nyhus , et al. April 18, 2	2017-04-18
Directed self assembly of block copolymers to form vias aligned with interconnects Grant 9,530,688 - Nyhus , et al. December 27, 2	2016-12-27
Patterning Of Vertical Nanowire Transisor Channel And Gate With Directed Self Assembly App 20160365429 - NYHUS; Paul A. ; et al.	2016-12-15
Patterning of vertical nanowire transistor channel and gate with directed self assembly Grant 9,431,518 - Nyhus , et al. August 30, 2	2016-08-30
Self-Aligned Via and Plug Patterning for Back End of Line (BEOL) Interconnects App 20160204002 - WALLACE; CHARLES H. ; et al.	2016-07-14
Subtractive Self-Aligned Via and Plug Patterning for Back End of Line (BEOL) Interconnects App 20160197011 - BRISTOL; ROBERT L. ; et al.	2016-07-07
Previous Layer Self-Aligned Via and Plug Patterning for Back End of Line (BEOL)Interconnects App 20160190009 - WALLACE; CHARLES H. ; et al.	2016-06-30
Patterning Of Vertical Nanowire Transistor Channel And Gate With Directed Self Assembly App 20160133724 - NYHUS; Paul A. ; et al.	2016-05-12
Pre-patterned hard mask for ultrafast lithographic imaging Grant 9,285,682 - Bristol , et al. March 15, 2	2016-03-15
Patterning of vertical nanowire transistor channel and gate with directed self assembly Grant 9,269,630 - Nyhus , et al. February 23, 2	2016-02-23
Directed Self Assembly Of Block Copolymers To Form Vias Aligned With Interconnects App 20150348839 - Nyhus; Paul A. ; et al.	2015-12-03
Directed self assembly of block copolymers to form vias aligned with interconnects Grant 9,153,477 - Nyhus , et al. October 6, 2	2015-10-06
Patterning Of Vertical Nanowire Transistor Channel And Gate With Directed Self Assembly App 20150270374 - NYHUS; Paul A. ; et al.	2015-09-24
Pre-patterned Hard Mask For Ultrafast Lithographic Imaging App 20150253667 - BRISTOL; ROBERT L. ; et al.	2015-09-10
Patterning of vertical nanowire transistor channel and gate with directed self assembly Grant 9,054,215 - Nyhus , et al. June 9, 2	2015-06-09
Pre-patterned hard mask for ultrafast lithographic imaging Grant 9,005,875 - Bristol , et al. April 14, 2	2015-04-14
Exposure Activated Chemically Amplified Directed Self-assembly (dsa) For Back End Of Line (beol) Pattern Cutting And Plugging App 20150093702 - Nyhus; Paul A. ; et al.	2015-04-02
Techniques for phase tuning for process optimization Grant 8,959,465 - Nyhus , et al. February 17, 2	2015-02-17
Pre-patterned Hard Mask For Ultrafast Lithographic Imaging App 20140272711 - BRISTOL; ROBERT L. ; et al.	2014-09-18
Patterning Of Vertical Nanowire Transistor Channel And Gate With Directed Self Assembly App 20140170821 - NYHUS; Paul A. ; et al.	2014-06-19
Directed Self Assembly Of Block Copolymers To Form Vias Aligned With Interconnects App 20140091476 - Nyhus; Paul A. ; et al.	2014-04-03
Techniques For Phase Tuning For Process Optimization App 20140053117 - Nyhus; Paul A. ; et al.	2014-02-20
Sub-resolution assist features Grant 7,759,028 - Wallace , et al. July 20, 2	2010-07-20
Sub-resolution Assist Features App 20100068633 - WALLACE; CHARLES H. ; et al.	2010-03-18
Sub-resolution assist features Grant 7,632,610 - Wallace , et al. December 15, 2	2009-12-15
Sub-resolution assist features App 20060046160 - Wallace; Charles H. ; et al.	2006-03-02

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