Nye, III; Henry A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nye, III; Henry A..The latest application filed is for "interconnections for flip-chip using lead-free solders and having reaction barrier layers".

Company Profile

0.18.3

Nye, III; Henry A. - Brookfield CT
Nye, III; Henry A. - Bedford NY
Nye, III; Henry A. - Danbury CT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Interconnections For Flip-chip Using Lead-free Solders And Having Reaction Barrier Layers App 20120012642 - Fogel; Keith E. ; et al.	2012-01-19
Interconnections for flip-chip using lead-free solders and having reaction barrier layers Grant 8,026,613 - Fogel , et al. September 27, 2	2011-09-27
Interconnections for flip-chip using lead-free solders and having reaction barrier layers Grant 7,923,849 - Fogel , et al. April 12, 2	2011-04-12
Structure and method of chemically formed anchored metallic vias Grant 7,517,736 - Mehta , et al. April 14, 2	2009-04-14
Gradient Deposition Of Low-k Cvd Materials App 20090026587 - Angyal; Matthew ; et al.	2009-01-29
Interconnections for flip-chip using lead-free solders and having reaction barrier layers Grant 7,410,833 - Fogel , et al. August 12, 2	2008-08-12
Immersion plating and plated structures Grant 7,276,296 - Cooper , et al. October 2, 2	2007-10-02
Ball limiting metallurgy, interconnection structure including the same, and method of forming an interconnection structure Grant 7,273,803 - Cheng , et al. September 25, 2	2007-09-25
Preventing Damage To Interlevel Dielectric App 20070072412 - Dunn; Derren N. ; et al.	2007-03-29
Immersion plating and plated structures Grant 7,037,559 - Cooper , et al. May 2, 2	2006-05-02
Insulative cap for laser fusing Grant 6,946,379 - Daubenspeck , et al. September 20, 2	2005-09-20
Support structures for wirebond regions of contact pads over low modulus materials Grant 6,908,841 - Burrell , et al. June 21, 2	2005-06-21
Inhibition of tin oxide formation in lead free interconnect formation Grant 6,900,142 - Cooper , et al. May 31, 2	2005-05-31
Method for improving adhesion to copper Grant 6,821,890 - McGahay , et al. November 23, 2	2004-11-23
Insulative cap for laser fusing Grant 6,784,516 - Daubenspeck , et al. August 31, 2	2004-08-31
Alpha particle shield for integrated circuit Grant 6,531,759 - Wachnik , et al. March 11, 2	2003-03-11
Crackstop and oxygen barrier for low-K dielectric integrated circuits Grant 6,261,945 - Nye, III , et al. July 17, 2	2001-07-17
Robust interconnect structure Grant 6,133,136 - Edelstein , et al. October 17, 2	2000-10-17
Electroplated solder terminal Grant 5,629,564 - Nye, III , et al. May 13, 1	1997-05-13
Electroplated solder terminal Grant 5,503,286 - Nye, III , et al. April 2, 1	1996-04-02
Etching processes for avoiding edge stress in semiconductor chip solder bumps Grant 5,268,072 - Agarwala , et al. December 7, 1	1993-12-07

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