loadpatents
name:-0.048548936843872
name:-0.082468032836914
name:-0.0047340393066406
Nuckel; Armin Patent Filings

Nuckel; Armin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nuckel; Armin.The latest application filed is for "methods and systems for transferring data between a processing device and external devices".

Company Profile
1.29.35
  • Nuckel; Armin - Neupotz DE
  • Nuckel; Armin - 76777 Neupotz DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for providing subapplications to an array of ALUs
Grant 10,409,765 - Vorbach , et al. Sept
2019-09-10
Methods And Systems For Transferring Data Between A Processing Device And External Devices
App 20190102173 - Vorbach; Martin ;   et al.
2019-04-04
Array Processor Having a Segmented Bus System
App 20190065428 - VORBACH; Martin ;   et al.
2019-02-28
Method of transferring data between external devices and an array processor
Grant 10,152,320 - Vorbach , et al. Dec
2018-12-11
Array Processor Having a Segmented Bus System
App 20180300278 - VORBACH; Martin ;   et al.
2018-10-18
Method For Providing Subapplications To An Array Of Alus
App 20170286364 - Vorbach; Martin ;   et al.
2017-10-05
Configurable logic integrated circuit having a multidimensional structure of configurable elements
Grant 9,690,747 - Vorbach , et al. June 27, 2
2017-06-27
Array processor having a segmented bus system
Grant 9,626,325 - Vorbach , et al. April 18, 2
2017-04-18
Method of Transferring Data between External Devices and an Array Processor
App 20160357555 - Vorbach; Martin ;   et al.
2016-12-08
Methods and systems for transferring data between a processing device and external devices
Grant 9,411,532 - Vorbach , et al. August 9, 2
2016-08-09
Array Processor Having a Segmented Bus System
App 20160154758 - VORBACH; Martin ;   et al.
2016-06-02
Data processor chip with flexible bus system
Grant 9,256,575 - Vorbach , et al. February 9, 2
2016-02-09
Multi-processor bus and cache interconnection system
Grant 9,250,908 - Vorbach , et al. February 2, 2
2016-02-02
Data processor chip with flexible bus system
App 20150261722 - VORBACH; Martin ;   et al.
2015-09-17
Methods and Systems for Transferring Data between a Processing Device and External Devices
App 20150261474 - Vorbach; Martin ;   et al.
2015-09-17
Logical cell array and bus system
Grant 9,047,440 - Vorbach , et al. June 2, 2
2015-06-02
Configurable Logic Integrated Circuit Having A Multidimensional Structure Of Configurable Elements
App 20150100756 - Vorbach; Martin ;   et al.
2015-04-09
Parallel Processing Array of Arithmetic Unit having a Barrier Instruction
App 20150033000 - Vorbach; Martin ;   et al.
2015-01-29
Method of Processing Data with an Array of Data Processors According to Application ID
App 20150026431 - Vorbach; Martin ;   et al.
2015-01-22
Logical cell array and bus system
App 20140359254 - Vorbach; Martin ;   et al.
2014-12-04
Configurable Logic Integrated Circuit Having A Multidimensional Structure Of Configurable Elements
App 20140337601 - Vorbach; Martin ;   et al.
2014-11-13
Pipeline Configuration Protocol And Configuration Unit Communication
App 20140325175 - Vorbach; Martin ;   et al.
2014-10-30
Method for the translation of programs for reconfigurable architectures
Grant 8,869,121 - Vorbach , et al. October 21, 2
2014-10-21
Multi-processor bus and cache interconnection system
App 20140310466 - Vorbach; Martin ;   et al.
2014-10-16
Configurable logic integrated circuit having a multidimensional structure of configurable elements
Grant 8,726,250 - Vorbach , et al. May 13, 2
2014-05-13
Logic cell array and bus system
Grant 8,471,593 - Vorbach , et al. June 25, 2
2013-06-25
Pipeline configuration protocol and configuration unit communication
Grant 8,468,329 - Vorbach , et al. June 18, 2
2013-06-18
Pipeline Configuration Protocol And Configuration Unit Communication
App 20120311301 - VORBACH; Martin ;   et al.
2012-12-06
Processor chip including a plurality of cache elements connected to a plurality of processor cores
Grant 8,312,200 - Vorbach , et al. November 13, 2
2012-11-13
Pipeline configuration protocol and configuration unit communication
Grant 8,301,872 - Vorbach , et al. October 30, 2
2012-10-30
Method and device for processing data
Grant 8,281,265 - Vorbach , et al. October 2, 2
2012-10-02
Method for interleaving a program over a plurality of cells
Grant 8,230,411 - Vorbach , et al. July 24, 2
2012-07-24
Logic Cell Array And Bus System
App 20120072699 - VORBACH; Martin ;   et al.
2012-03-22
Logic cell array and bus system
Grant 8,058,899 - Vorbach , et al. November 15, 2
2011-11-15
Method For The Translation Of Programs For Reconfigurable Architectures
App 20110271264 - VORBACH; Martin ;   et al.
2011-11-03
Method for the translation of programs for reconfigurable architectures
Grant 7,996,827 - Vorbach , et al. August 9, 2
2011-08-09
Configurable Logic Integrated Circuit Having A Multidimensional Structure Of Configurable Elements
App 20110012640 - VORBACH; Martin ;   et al.
2011-01-20
Method for debugging reconfigurable architectures
Grant 7,840,842 - Vorbach , et al. November 23, 2
2010-11-23
Configurable Logic Integrated Circuit Having A Multidimensional Structure Of Configurable Elements
App 20100287324 - VORBACH; Martin ;   et al.
2010-11-11
Configurable Logic Integrated Circuit Having A Multidimensional Structure Of Configurable Elements
App 20100228918 - VORBACH; MARTIN ;   et al.
2010-09-09
Method For Processing Data
App 20100095094 - VORBACH; Martin ;   et al.
2010-04-15
Method And Device For Processing Data
App 20100070671 - VORBACH; Martin ;   et al.
2010-03-18
Method and device for processing data
Grant 7,657,861 - Vorbach , et al. February 2, 2
2010-02-02
Method for processing data
Grant 7,657,877 - Vorbach , et al. February 2, 2
2010-02-02
Logic cell array and bus system
Grant 7,595,659 - Vorbach , et al. September 29, 2
2009-09-29
Method And Device For Treating And Processing Data
App 20090210653 - Vorbach; Martin ;   et al.
2009-08-20
Logic Cell Array And Bus System
App 20090146691 - VORBACH; Martin ;   et al.
2009-06-11
Method for debugging reconfigurable architectures
App 20090006895 - May; Frank ;   et al.
2009-01-01
Method and Device for Treating and Processing Data
App 20070299993 - Vorbach; Martin ;   et al.
2007-12-27
Method for debugging reconfigurable architectures
Grant 7,266,725 - Vorbach , et al. September 4, 2
2007-09-04
Method for translating programs for reconfigurable architectures
Grant 7,210,129 - May , et al. April 24, 2
2007-04-24
Method and device for processing data
App 20060248317 - Vorbach; Martin ;   et al.
2006-11-02
Pipeline configuration unit protocols and communication
Grant 7,003,660 - Vorbach , et al. February 21, 2
2006-02-21
Pipeline configuration protocol and configuration unit communication
App 20050223212 - Vorbach, Martin ;   et al.
2005-10-06
Method for the translation of programs for reconfigurable architectures
App 20050086649 - Vorbach, Martin ;   et al.
2005-04-21
Data processing method
App 20040243984 - Vorbach, Martin ;   et al.
2004-12-02
Pipeline configuration unit protocols and communication
App 20040025005 - Vorbach, Martin ;   et al.
2004-02-05
Method for processing data
App 20040015899 - May, Frank ;   et al.
2004-01-22
Method for translating programs for reconfigurable architectures
App 20030056202 - May, Frank ;   et al.
2003-03-20
Method for debugging reconfigurable architectures
App 20030046607 - May, Frank ;   et al.
2003-03-06

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