Nuber; Paul D

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nuber; Paul D.The latest application filed is for "method and apparatus for ensuring signal integrity in a latch array".

Company Profile

0.5.4

Nuber; Paul D - Ft Collins CO
Nuber, Paul D. - Ft. Collins CO
Nuber, Paul D. - Fort Collins CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for ensuring signal integrity in a latch array Grant 6,894,535 - Robertson , et al. May 17, 2	2005-05-17
Method and apparatus for preventing buffers from being damaged by electrical charges collected on lines connected to the buffers Grant 6,775,116 - Nuber , et al. August 10, 2	2004-08-10
Method of integrated circuit construction with port alignment and timing signal buffering within a common area Grant 6,734,473 - Welch , et al. May 11, 2	2004-05-11
Bypass capacitance localization Grant 6,653,858 - Meier , et al. November 25, 2	2003-11-25
System and method for dynamic modification of integrated circuit functionality Grant 6,614,260 - Welch , et al. September 2, 2	2003-09-02
Method and apparatus for ensuring signal integrity in a latch array App 20030128046 - Robertson, Jeffrey Thomas ; et al.	2003-07-10
Bypass Capacitance Localization App 20030107396 - Meier, Victoria ; et al.	2003-06-12
Method and apparatus for preventing buffers from being damaged by electrical charges collected on lines connected to the buffers App 20030081361 - Nuber, Paul D. ; et al.	2003-05-01
Method for inserting repeaters in hierarchical chip design App 20020129326 - Nuber, Paul D. ; et al.	2002-09-12

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