Nowak; Matthew M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nowak; Matthew M..The latest application filed is for "tunable diplexers in three-dimensional (3d) integrated circuits (ic) (3dic) and related components and methods".

Company Profile

0.22.24

Nowak; Matthew M. - San Diego CA
Nowak; Matthew M - San Diego CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Two-stage power delivery architecture Grant 10,039,188 - Yun , et al. July 31, 2	2018-07-31
Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) and related components and methods Grant 9,813,043 - Zuo , et al. November 7, 2	2017-11-07
MRAM word line power control scheme Grant 9,672,885 - Kim , et al. June 6, 2	2017-06-06
Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) and related components and methods Grant 9,634,640 - Zuo , et al. April 25, 2	2017-04-25
Devices, systems and methods using through silicon optical interconnects Grant 9,478,528 - Kaskoun , et al. October 25, 2	2016-10-25
Tunable Diplexers In Three-dimensional (3d) Integrated Circuits (ic) (3dic) And Related Components And Methods App 20160204758 - Zuo; Chengjie ; et al.	2016-07-14
Diplexer design using through glass via technology Grant 9,203,373 - Zuo , et al. December 1, 2	2015-12-01
Two-stage Power Delivery Architecture App 20150334847 - Yun; Changhan ; et al.	2015-11-19
Two-stage power delivery architecture Grant 9,101,068 - Yun , et al. August 4, 2	2015-08-04
Daisy chain connection for testing continuity in a semiconductor die Grant 9,024,315 - Yao , et al. May 5, 2	2015-05-05
Inductive Device That Includes Conductive Via And Metal Layer App 20150035162 - Lan; Je-Hsiung ; et al.	2015-02-05
Systems For Reducing Magnetic Coupling In Integrated Circuits (ics), And Related Components And Methods App 20140354372 - Zuo; Chengjie ; et al.	2014-12-04
Tunable Diplexers In Three-dimensional (3d) Integrated Circuits (ic) (3dic) And Related Components And Methods App 20140327496 - Zuo; Chengjie ; et al.	2014-11-06
MTJ structure and integration scheme Grant 8,866,242 - Li , et al. October 21, 2	2014-10-21
Two-stage Power Delivery Architecture App 20140268615 - Yun; Changhan ; et al.	2014-09-18
Daisy Chain Connection For Testing Continuity In A Semiconductor Die App 20140264331 - Yao; Hongjun ; et al.	2014-09-18
Diplexer Design Using Through Glass Via Technology App 20140197902 - Zuo; Chengjie ; et al.	2014-07-17
Low Parasitic Package Substrate Having Embedded Passive Substrate Discrete Components And Method For Making Same App 20140167273 - Kim; Jonghae ; et al.	2014-06-19
Through Silicon Optical Interconnects App 20140131549 - Kaskoun; Kenneth ; et al.	2014-05-15
Transformer signal coupling for flip-chip integration Grant 8,717,118 - Kim , et al. May 6, 2	2014-05-06
Mram Word Line Power Control Scheme App 20140063922 - Kim; Sungryul ; et al.	2014-03-06
Non-reversible State At A Bitcell Having A First Magnetic Tunnel Junction And A Second Magnetic Tunnel Junction App 20140010006 - Rao; Hari M. ; et al.	2014-01-09
Apparatus and method for through silicon via impedance matching Grant 8,618,629 - Kim , et al. December 31, 2	2013-12-31
Reduced susceptibility to electrostatic discharge during 3D semiconductor device bonding and assembly Grant 8,604,626 - Henderson , et al. December 10, 2	2013-12-10
Wide input/output memory with low density, low latency and high density, high latency blocks Grant 8,595,429 - Gu , et al. November 26, 2	2013-11-26
Low Cost High Throughput Tsv/microbump Probe App 20130297981 - Gu; Shiqun ; et al.	2013-11-07
Mtj Structure And Integration Scheme App 20130119494 - Li; Xia ; et al.	2013-05-16
Transformer Signal Coupling For Flip-chip Integration App 20130095576 - Kim; Jonghae ; et al.	2013-04-18
Forming radio frequency integrated circuits Grant 8,362,599 - Kim , et al. January 29, 2	2013-01-29
System and method to manufacture magnetic random access memory Grant 8,208,290 - Rao , et al. June 26, 2	2012-06-26
Wide Input/Output Memory with Low Density, Low Latency and High Density, High Latency Blocks App 20120054422 - Gu; Shiqun ; et al.	2012-03-01
Three Dimensional Wire Bond Inductor and Transformer App 20110316657 - Park; Sang-June ; et al.	2011-12-29
Apparatus and Method for Through Silicon via Impedance Matching App 20110084358 - Kim; Jonghae ; et al.	2011-04-14
Forming Radio Frequency Integrated Circuits App 20110068433 - Kim; Jonghae ; et al.	2011-03-24
System and Method to Manufacture Magnetic Random Access Memory App 20110051509 - Rao; Hari M. ; et al.	2011-03-03
Memory Cell and Method of Forming a Magnetic Tunnel Junction (MTJ) of a Memory Cell App 20090174015 - Gu; Shiqun ; et al.	2009-07-09
Integrated circuit employing dummy conductors for planarity Grant 4,916,514 - Nowak April 10, 1	1990-04-10

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