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Nosowicz; Eugene James Patent Filings

Nosowicz; Eugene James

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nosowicz; Eugene James.The latest application filed is for "set/reset latch with minimum single event upset".

Company Profile
0.5.6
  • Nosowicz; Eugene James - Vestal NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Set/reset latch with minimum single event upset
Grant 7,486,123 - Chen , et al. February 3, 2
2009-02-03
Set/reset latch with minimum single event upset
Grant 7,425,855 - Chen , et al. September 16, 2
2008-09-16
Set/reset Latch With Minimum Single Event Upset
App 20080111606 - Chen; David Jia ;   et al.
2008-05-15
Method and apparatus for implementing fault tolerant phase locked loop (PLL)
Grant 7,259,602 - Nosowicz August 21, 2
2007-08-21
Method and apparatus for implementing fault tolerant phase locked loop (PLL)
App 20070018698 - Nosowicz; Eugene James
2007-01-25
Set/reset latch with minimum single event upset
App 20070013426 - Chen; David Jia ;   et al.
2007-01-18
Method and latch circuit for implementing enhanced performance with reduced quiescent power dissipation using mixed threshold CMOS devices
Grant 7,103,857 - Nosowicz September 5, 2
2006-09-05
Low power data storage element with enhanced noise margin
Grant 6,954,086 - Chen , et al. October 11, 2
2005-10-11
Method and latch circuit for implementing enhanced performance with reduced quiescent power dissipation using mixed threshold CMOS devices
App 20050149766 - Nosowicz, Eugene James
2005-07-07
Low power data storage element with enhanced noise margin
App 20050075814 - Chen, David Jia ;   et al.
2005-04-07
Electronic delay element
App 20050062511 - Chen, David Jia ;   et al.
2005-03-24

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