| Patent | Date |
|---|
Functional simulation redundancy reduction by state comparison and pruning
Grant 8,539,404 - Craig , et al. September 17, 2 | 2013-09-17 |
Functional Simulation Redundancy Reduction By State Comparison And Pruning
App 20130080983 - Craig; Jesse E. ; et al. | 2013-03-28 |
Critical path redundant logic for mitigation of hardware across chip variation
Grant 7,898,286 - Arsovski , et al. March 1, 2 | 2011-03-01 |
System and method for system-on-chip interconnect verification
Grant 7,865,789 - Bueti , et al. January 4, 2 | 2011-01-04 |
Transition balancing for noise reduction/Di/Dt reduction during design, synthesis, and physical design
Grant 7,823,107 - Arsovski , et al. October 26, 2 | 2010-10-26 |
Critical Path Redundant Logic for Mitigation of Hardware Across Chip Variation
App 20100201377 - ARSOVSKI; Igor ; et al. | 2010-08-12 |
Assigning clock arrival time for noise reduction
Grant 7,743,270 - Arsovski , et al. June 22, 2 | 2010-06-22 |
Transition balancing for noise reduction /Di/Dt reduction during design, synthesis, and physical design
Grant 7,643,591 - Arsovski , et al. January 5, 2 | 2010-01-05 |
Universal Peripheral Processor System For Soc Environments On An Integrated Circuit
App 20090132732 - Bueti; Serafino ; et al. | 2009-05-21 |
Structure For Universal Peripheral Processor System For Soc Environments On An Integrated Circuit
App 20090132747 - Bueti; Serafino ; et al. | 2009-05-21 |
Shifting Inactive Clock Edge For Noise Reduction
App 20090102529 - Arsovski; Igor ; et al. | 2009-04-23 |
Transition Balancing For Noise Reduction/Di/Dt Reduction During Design, Synthesis, and Physical Design
App 20090106724 - Arsovski; Igor ; et al. | 2009-04-23 |
Method of manufacturing integrated circuits using pre-made and pre-qualified exposure masks for selected blocks of circuitry
Grant 7,519,941 - Bueti , et al. April 14, 2 | 2009-04-14 |
Executing Software Within Real-Time Hardware Constraints Using Functionally Programmable Branch Table
App 20080282072 - Leonard; Todd E. ; et al. | 2008-11-13 |
Structure For Executing Software Within Real-time Hardware Constraints Using Functionally Programmable Branch Table
App 20080278195 - Goodnow; Kenneth ; et al. | 2008-11-13 |
System and method for system-on-chip interconnect verification
App 20080215945 - Bueti; Serafino ; et al. | 2008-09-04 |
Fiber Optic Transmission Lines On An Soc
App 20080212977 - Doyle; Gary R. ; et al. | 2008-09-04 |
Assigning Clock Arrival Time For Noise Reduction
App 20080065923 - Arsovski; Igor ; et al. | 2008-03-13 |
TRANSITION BALANCING FOR NOISE REDUCTION /di/dt REDUCTION DURING DESIGN, SYNTHESIS, AND PHYSICAL DESIGN
App 20080043890 - Arsovski; Igor ; et al. | 2008-02-21 |
Shifting Inactive Clock Edge For Noise Reduction
App 20080046772 - Arsovski; Igor ; et al. | 2008-02-21 |
System and method for system-on-chip interconnect verification
Grant 7,313,738 - Bueti , et al. December 25, 2 | 2007-12-25 |
Circuit design verification using checkpointing
Grant 7,308,663 - Craig , et al. December 11, 2 | 2007-12-11 |
Fiber optic transmission lines on an SOC
Grant 7,286,770 - Doyle , et al. October 23, 2 | 2007-10-23 |
Method Of Manufacturing Integrated Circuits Using Pre-made And Pre-qualified Exposure Masks For Selected Blocks Of Circuitry
App 20070245290 - Bueti; Serafino ; et al. | 2007-10-18 |
Method and apparatus for monitoring integrated circuit temperature through deterministic path delays
Grant 7,275,011 - Bueti , et al. September 25, 2 | 2007-09-25 |
Wireless communication system within a system on a chip
Grant 7,248,838 - Goodnow , et al. July 24, 2 | 2007-07-24 |
Circuit Design Verification Using Checkpointing
App 20070074135 - Craig; Jesse E. ; et al. | 2007-03-29 |
Method And Apparatus For Monitoring Integrated Circuit Temperature Through Deterministic Path Delays
App 20070005290 - Bueti; Serafino ; et al. | 2007-01-04 |
A Method And Apparatus For Transferring Data Between Cores In An Integrated Circuit
App 20060262779 - Courchesne; Adam J. ; et al. | 2006-11-23 |
Semiconductor device comprising a plurality of memory structures
Grant 7,139,881 - Goodnow , et al. November 21, 2 | 2006-11-21 |
System And Method For System-on-chip Interconnect Verification
App 20060242524 - Bueti; Serafino ; et al. | 2006-10-26 |
Wireless communication system within a system on a chip
Grant 7,103,320 - Goodnow , et al. September 5, 2 | 2006-09-05 |
Wireless communication system within a system on a chip
App 20060189294 - Goodnow; Kenneth J. ; et al. | 2006-08-24 |
Data acknowledgment using impedance mismatching
Grant 7,091,743 - Boudreaux , et al. August 15, 2 | 2006-08-15 |
System and method for correcting timing signals in integrated circuits
Grant 7,085,993 - Goodnow , et al. August 1, 2 | 2006-08-01 |
Method And Apparatus For Servicing Threads Within A Multi-processor System
App 20060095905 - Courchesne; Adam J. ; et al. | 2006-05-04 |
System And Method For Arbitration Between Shared Peripheral Core Devices In System On Chip Architectures
App 20060041705 - Bueti; Serafino ; et al. | 2006-02-23 |
Data acknowledgment using impedance mismatching
App 20050076170 - Boudreaux, Michael J. ; et al. | 2005-04-07 |
Semiconductor Device Comprising A Plurality Of Memory Structures
App 20050071575 - Goodnow, Kenneth J. ; et al. | 2005-03-31 |
Fiber Optic Transmission Lines On An Soc
App 20050013527 - Doyle, Gary R. ; et al. | 2005-01-20 |
Wireless Communication System Within A System On A Chip
App 20040209575 - Goodnow, Kenneth J. ; et al. | 2004-10-21 |
System and method for correcting timing signals in integrated circuits
App 20040019844 - Goodnow, Kenneth J. ; et al. | 2004-01-29 |
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