loadpatents
name:-0.0094950199127197
name:-0.009483814239502
name:-0.00040411949157715
Noma; Hirokazu Patent Filings

Noma; Hirokazu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Noma; Hirokazu.The latest application filed is for "interfacial alloy layer for improving electromigration (em) resistance in solder joints".

Company Profile
0.7.8
  • Noma; Hirokazu - Tokyo JP
  • Noma; Hirokazu - Kawasaki JP
  • Noma; Hirokazu - Shiga-ken JP
  • Noma; Hirokazu - Yasu JP
  • Noma; Hirokazu - Yasu-shi JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Via for electrical contact passing through layers of optical waveguide in multilayer structure including electrical substrate and laminated layers of optical waveguide
Grant 9,772,462 - Noma , et al. September 26, 2
2017-09-26
Circuit board formation using organic substrates
Grant 9,760,002 - Mori , et al. September 12, 2
2017-09-12
Interfacial alloy layer for improving electromigration (EM) resistance in solder joints
Grant 9,698,119 - Noma , et al. July 4, 2
2017-07-04
Circuit board formation using organic substrates
Grant 9,684,237 - Mori , et al. June 20, 2
2017-06-20
Interfacial Alloy Layer For Improving Electromigration (em) Resistance In Solder Joints
App 20160260681 - Noma; Hirokazu ;   et al.
2016-09-08
Via For Electrical Contact Passing Through Layers Of Optical Waveguide In Multilayer Structure Including Electrical Substrate And Laminated Layers Of Optical Waveguide
App 20160246017 - Noma; Hirokazu ;   et al.
2016-08-25
Interfacial alloy layer for improving electromigration (EM) resistance in solder joints
Grant 9,391,034 - Noma , et al. July 12, 2
2016-07-12
Via for electrical contact passing through layers of optical waveguide in multilayer structure including electrical substrate and laminated layers of optical waveguide
Grant 9,354,408 - Noma , et al. May 31, 2
2016-05-31
Circuit Board Formation Using Organic Substrates
App 20160081187 - Mori; Hiroyuki ;   et al.
2016-03-17
Circuit Board Formation Using Organic Substrates
App 20160057857 - Mori; Hiroyuki ;   et al.
2016-02-25
Via For Electrical Contact Passing Through Layers Of Optical Waveguide In Multilayer Structure Including Electrical Substrate And Laminated Layers Of Optical Waveguide
App 20150338589 - Noma; Hirokazu ;   et al.
2015-11-26
Interfacial Alloy Layer For Improving Electromigration (em) Resistance In Solder Joints
App 20140061889 - Noma; Hirokazu ;   et al.
2014-03-06
Semiconductor Package And Manufacturing Method Therefor
App 20090047755 - Yamaji; Yoshiyuki ;   et al.
2009-02-19
Semiconductor package and manufacturing method therefor
Grant 7,484,293 - Yamaji , et al. February 3, 2
2009-02-03
Semiconductor Package and Manufacturing Method Therefor
App 20070145551 - Yamaji; Yoshiyuki ;   et al.
2007-06-28

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