Noda; Tomonobu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Noda; Tomonobu.The latest application filed is for "semiconductor substrate, substrate inspection method, semiconductor device manufacturing method, and inspection apparatus".

Company Profile

0.7.7

Noda; Tomonobu - Oita JP
Noda; Tomonobu - Oita-Shi JP
Noda; Tomonobu - Yokohama JP
Noda, Tomonobu - Yokohama-shi JP
Noda; Tomonobu - Kanagawa-ken JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor substrate, substrate inspection method, semiconductor device manufacturing method, and inspection apparatus Grant 7,973,281 - Hayashi , et al. July 5, 2	2011-07-05
Semiconductor substrate, substrate inspection method, semiconductor device manufacturing method, and inspection apparatus App 20090272901 - Hayashi; Hiroyuki ; et al.	2009-11-05
Semiconductor substrate, substrate inspection method, semiconductor device manufacturing method, and inspection apparatus Grant 7,573,066 - Hayashi , et al. August 11, 2	2009-08-11
Semiconductor substrate, substrate inspection method, semiconductor device manufacturing method, and inspection apparatus App 20080011947 - Hayashi; Hiroyuki ; et al.	2008-01-17
System and method for monitoring manufacturing apparatuses Grant 7,221,991 - Matsushita , et al. May 22, 2	2007-05-22
System and method for controlling manufacturing apparatuses App 20050194590 - Matsushita, Hiroshi ; et al.	2005-09-08
System for and method of evaluating mask patterns Grant 6,711,733 - Noda March 23, 2	2004-03-23
Manufacturing process evaluation method for semiconductor device and pattern shape evaluation apparatus using the evaluation method Grant 6,671,861 - Noda December 30, 2	2003-12-30
Method of evaluating critical locations on a semiconductor apparatus pattern Grant 6,657,735 - Noda , et al. December 2, 2	2003-12-02
Simulated defective wafer and pattern defect inspection recipe preparing method Grant 6,583,870 - Noda June 24, 2	2003-06-24
System for and method of evaluating mask patterns App 20030056184 - Noda, Tomonobu	2003-03-20
Manufacturing process evaluation method for semiconductor device and pattern shape evaluation apparatus using the evaluation method App 20020144221 - Noda, Tomonobu	2002-10-03
Method of evaluating critical locations on a semiconductor apparatus pattern App 20020030187 - Noda, Tomonobu ; et al.	2002-03-14
Simulated defective wafer and pattern defect inspection recipe preparing method App 20020006497 - Noda, Tomonobu	2002-01-17

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