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Niu; Dimin Patent Filings

Niu; Dimin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Niu; Dimin.The latest application filed is for "dynamic memory coherency biasing techniques".

Company Profile
55.64.85
  • Niu; Dimin - Hangzhou CN
  • Niu; Dimin - Sunnyvale CA
  • Niu; Dimin - San Mateo CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Using electrical connections that traverse scribe lines to connect devices on a chip
Grant 11,437,337 - Li , et al. September 6, 2
2022-09-06
High bandwidth memory system
Grant 11,436,165 - Malladi , et al. September 6, 2
2022-09-06
Processing accelerator architectures
Grant 11,409,684 - Lin , et al. August 9, 2
2022-08-09
Dynamic Memory Coherency Biasing Techniques
App 20220244870 - DUAN; Lide ;   et al.
2022-08-04
Asynchronous communication protocol compatible with synchronous DDR protocol
Grant 11,397,698 - Niu , et al. July 26, 2
2022-07-26
Coordinated In-module Ras Features For Synchronous Ddr Compatible Memory
App 20220229551 - CHANG; Mu-Tien ;   et al.
2022-07-21
Memory interconnection architecture systems and methods
Grant 11,355,163 - Han , et al. June 7, 2
2022-06-07
Dual-modal Memory Interface Controller
App 20220121586 - Wang; Yuhao ;   et al.
2022-04-21
Coordinated in-module RAS features for synchronous DDR compatible memory
Grant 11,294,571 - Chang , et al. April 5, 2
2022-04-05
Memory Interconnection Architecture Systems And Methods
App 20220101887 - HAN; Wei ;   et al.
2022-03-31
Configurable Computer Memory Architecture
App 20220102333 - LI; Shuangchen ;   et al.
2022-03-31
System and method for allocating memory space
Grant 11,263,131 - Li , et al. March 1, 2
2022-03-01
Narrow Dram Channel Systesm And Methods
App 20220050794 - LIN; Jilan ;   et al.
2022-02-17
Vector Accelerator For Artificial Intelligence And Machine Learning
App 20220051086 - XUE; Fei ;   et al.
2022-02-17
Flash Memory With Improved Bandwidth
App 20220045044 - Xue; Fei ;   et al.
2022-02-10
Control of NAND flash memory for al applications
Grant 11,244,718 - Xue , et al. February 8, 2
2022-02-08
Hbm Ras Cache Architecture
App 20220035719 - NIU; Dimin ;   et al.
2022-02-03
Processing Accelerator Architectures
App 20220035760 - LIN; Jilan ;   et al.
2022-02-03
Device and method for low latency memory access
Grant 11,221,974 - Li , et al. January 11, 2
2022-01-11
Scale-out High Bandwidth Memory System
App 20210406202 - Malladi; Krishna T. ;   et al.
2021-12-30
System And Method For Performing A Top-k Function
App 20210382871 - SUN; Fei ;   et al.
2021-12-09
Dataflow Accelerator Architecture For General Matrix-matrix Multiplication And Tensor Computation In Deep Learning
App 20210374210 - GU; Peng ;   et al.
2021-12-02
Cache coherency for host-device systems
Grant 11,188,471 - Duan , et al. November 30, 2
2021-11-30
Systems and methods for write and flush support in hybrid memory
Grant 11,175,853 - Chang , et al. November 16, 2
2021-11-16
Systolic Array-friendly Data Placement And Control
App 20210334142 - Wang; Yuhao ;   et al.
2021-10-28
HBM RAS cache architecture
Grant 11,151,006 - Niu , et al. October 19, 2
2021-10-19
Using Electrical Connections That Traverse Scribe Lines To Connect Devices On A Chip
App 20210320080 - LI; Shuangchen ;   et al.
2021-10-14
System And Method For Allocating Memory Space
App 20210318955 - LI; Shuangchen ;   et al.
2021-10-14
3d-stacked Memory With Reconfigurable Compute Logic
App 20210311634 - Chang; Mu-Tien ;   et al.
2021-10-07
Cache Coherency For Host-device Systems
App 20210311878 - DUAN; Lide ;   et al.
2021-10-07
Scale-out high bandwidth memory system
Grant 11,138,135 - Malladi , et al. October 5, 2
2021-10-05
Dram Assist Error Correction Mechanism For Ddr Sdram Interface
App 20210294697 - NIU; DIMIN ;   et al.
2021-09-23
Dataflow accelerator architecture for general matrix-matrix multiplication and tensor computation in deep learning
Grant 11,100,193 - Gu , et al. August 24, 2
2021-08-24
System And Method For Memory Management
App 20210248073 - LIN; Jilan ;   et al.
2021-08-12
Device And Method For Low Latency Memory Access
App 20210248093 - LI; Shuangchen ;   et al.
2021-08-12
3-D stacked memory with reconfigurable compute logic
Grant 11,079,936 - Chang , et al. August 3, 2
2021-08-03
Method and system for memory control
Grant 11,068,200 - Niu , et al. July 20, 2
2021-07-20
Memory module, operation method therof, and operation method of host
Grant 11,048,645 - Lim , et al. June 29, 2
2021-06-29
Memory Control Method And System
App 20210173784 - Niu; Dimin ;   et al.
2021-06-10
Page size synchronization and page size aware scheduling method for non-volatile memory dual in-line memory module (NVDIMM) over memory channel
Grant 11,029,879 - Niu , et al. June 8, 2
2021-06-08
Method And System For Memory Control
App 20210157516 - Niu; Dimin ;   et al.
2021-05-27
DRAM assist error correction mechanism for DDR SDRAM interface
Grant 11,010,242 - Niu , et al. May 18, 2
2021-05-18
Bandwidth Boosted Stacked Memory
App 20210141735 - MALLADI; Krishna T. ;   et al.
2021-05-13
DRAM assist error correction mechanism for DDR SDRAM interface
Grant 10,977,118 - Niu , et al. April 13, 2
2021-04-13
Method and device for refreshing memory
Grant 10,978,134 - Zheng , et al. April 13, 2
2021-04-13
Isa Extension For High-bandwidth Memory
App 20210096999 - Chang; Mu-Tien ;   et al.
2021-04-01
Multi-cell structure for non-volatile resistive memory
Grant 10,929,026 - Niu , et al. February 23, 2
2021-02-23
Bandwidth boosted stacked memory
Grant 10,915,451 - Malladi , et al. February 9, 2
2021-02-09
Method to deliver in-DRAM ECC information through DDR bus
Grant 10,908,993 - Niu , et al. February 2, 2
2021-02-02
Method to deliver in-DRAM ECC information through DDR bus
Grant 10,872,014 - Niu , et al. December 22, 2
2020-12-22
Byte-addressable flash-based memory module with prefetch mode that is adjusted based on feedback from prefetch accuracy that is calculated by comparing first decoded address and second decoded address, where the first decoded address is sent to memory controller, and the second decoded address is se
Grant 10,866,897 - Chang , et al. December 15, 2
2020-12-15
ISA extension for high-bandwidth memory
Grant 10,866,900 - Chang , et al. December 15, 2
2020-12-15
Scaling Out Architecture For Dram-based Processing Unit (dpu)
App 20200363966 - Niu; Dimin ;   et al.
2020-11-19
Bandwidth Boosted Stacked Memory
App 20200356488 - Malladi; Krishna T. ;   et al.
2020-11-12
Adaptive Matrix Multiplication Accelerator For Machine Learning And Deep Learning Applications
App 20200356375 - Jiang; Dongyan ;   et al.
2020-11-12
High Bandwidth Memory System
App 20200349093 - MALLADI; Krishna T. ;   et al.
2020-11-05
System and method for operating a DRR-compatible asynchronous memory module
Grant 10,810,144 - Lim , et al. October 20, 2
2020-10-20
Method to deliver in-DRAM ECC information through DDR bus
Grant 10,795,764 - Niu , et al. October 6, 2
2020-10-06
Techniques to reduce read-modify-write overhead in hybrid DRAM/NAND memory
Grant 10,762,000 - Chang , et al. Sep
2020-09-01
Adaptive Matrix Multiplication Accelerator For Machine Learning And Deep Learning Applications
App 20200272479 - Jiang; Dongyan ;   et al.
2020-08-27
Scaling out architecture for DRAM-based processing unit (DPU)
Grant 10,732,866 - Niu , et al.
2020-08-04
Coordinated In-module Ras Features For Synchronous Ddr Compatible Memory
App 20200218447 - CHANG; Mu-Tien ;   et al.
2020-07-09
Interface method of memory system, interface circuitry and memory module
Grant 10,692,566 - Lim , et al.
2020-06-23
Dataflow Accelerator Architecture For General Matrix-matrix Multiplication And Tensor Computation In Deep Learning
App 20200184001 - GU; Peng ;   et al.
2020-06-11
Dataflow Accelerator Architecture For General Matrix-matrix Multiplication And Tensor Computation In Deep Learning
App 20200183837 - GU; Peng ;   et al.
2020-06-11
Asynchronous Communication Protocol Compatible With Synchronous Ddr Protocol
App 20200167297 - NIU; Dimin ;   et al.
2020-05-28
Asynchronous communication protocol compatible with synchronous DDR protocol
Grant 10,621,119 - Niu , et al.
2020-04-14
Scale-out High Bandwidth Memory System
App 20200097417 - Malladi; Krishna T. ;   et al.
2020-03-26
Coordinated in-module RAS features for synchronous DDR compatible memory
Grant 10,592,114 - Chang , et al.
2020-03-17
Memory system and method of controlling the same
Grant 10,558,388 - Niu , et al. Feb
2020-02-11
Morphable ECC encoder/decoder for NVDIMM over DDR channel
Grant 10,552,256 - Niu , et al. Fe
2020-02-04
Hbm Ras Cache Architecture
App 20200004652 - NIU; Dimin ;   et al.
2020-01-02
Methods for addressing high capacity SDRAM-like memory without increasing pin cost
Grant 10,504,572 - Chang , et al. Dec
2019-12-10
Virtual bucket multiple hash tables for efficient memory in-line deduplication application
Grant 10,496,543 - Sala , et al. De
2019-12-03
Coordinated near-far memory controller for process-in-HBM
Grant 10,437,482 - Chang , et al. O
2019-10-08
Method To Deliver In-dram Ecc Information Through Ddr Bus
App 20190266049 - NIU; Dimin ;   et al.
2019-08-29
Method To Deliver In-dram Ecc Information Through Ddr Bus
App 20190266050 - NIU; Dimin ;   et al.
2019-08-29
Refresh aware replacement policy for volatile memory cache
Grant 10,394,719 - Chang , et al. A
2019-08-27
Method to deliver in-DRAM ECC information through DDR bus
Grant 10,394,648 - Niu , et al. A
2019-08-27
Memory Module, Operation Method Therof, And Operation Method Of Host
App 20190236030 - LIM; Sun-Young ;   et al.
2019-08-01
Page Size Synchronization And Page Size Aware Scheduling Method For Non-volatile Memory Dual In-line Memory Module (nvdimm) Over
App 20190235788 - NIU; Dimin ;   et al.
2019-08-01
Self-optimized power management for DDR-compatible memory systems
Grant 10,347,306 - Chang , et al. July 9, 2
2019-07-09
Dram Assist Error Correction Mechanism For Ddr Sdram Interface
App 20190179705 - Niu; Dimin ;   et al.
2019-06-13
Dram Assist Error Correction Mechanism For Ddr Sdram Interface
App 20190179704 - Niu; Dimin ;   et al.
2019-06-13
Optimized hopscotch multiple hash tables for efficient memory in-line deduplication application
Grant 10,318,434 - Sala , et al.
2019-06-11
Mitigating DRAM cache metadata access overhead with SRAM metadata cache and bloom filter
Grant 10,282,294 - Chang , et al.
2019-05-07
DRAM assist error correction mechanism for DDR SDRAM interface
Grant 10,268,541 - Niu , et al.
2019-04-23
Isa Extension For High-bandwidth Memory
App 20190114265 - Chang; Mu-Tien ;   et al.
2019-04-18
DPU architecture
Grant 10,242,728 - Li , et al.
2019-03-26
Hybrid DRAM array including dissimilar memory cells
Grant 10,223,252 - Chang , et al.
2019-03-05
Dual Row-column Major Dram
App 20190043553 - CHANG; Mu-Tien ;   et al.
2019-02-07
Coordinated Near-far Memory Controller For Process-in-hbm
App 20190034097 - Chang; Mu-Tien ;   et al.
2019-01-31
Software stack and programming for DPU operations
Grant 10,180,808 - Li , et al. Ja
2019-01-15
System and method for controlling a programmable deduplication ratio for a memory system
Grant 10,162,554 - Zheng , et al. Dec
2018-12-25
Systems And Methods For Write And Flush Support In Hybrid Memory
App 20180329651 - Chang; Mu-Tien ;   et al.
2018-11-15
Morphable Ecc Encoder/decoder For Nvdimm Over Ddr Channel
App 20180322007 - NIU; Dimin ;   et al.
2018-11-08
Hybrid memory controller with command buffer for arbitrating access to volatile and non-volatile memories in a hybrid memory group
Grant 10,114,560 - Niu , et al. October 30, 2
2018-10-30
Techniques To Reduce Read-modify-write Overhead In Hybrid Dram/nand Memory
App 20180293175 - Chang; Mu-Tien ;   et al.
2018-10-11
Hybrid Dram Array Including Dissimilar Memory Cells
App 20180285253 - Chang; Mu-Tien ;   et al.
2018-10-04
Mitigating Dram Cache Metadata Access Overhead With Sram Metadata Cache And Bloom Filter
App 20180232310 - Chang; Mu-Tien ;   et al.
2018-08-16
Wear leveling for storage or memory device
Grant 10,049,717 - Niu , et al. August 14, 2
2018-08-14
Refresh Aware Replacement Policy For Volatile Memory Cache
App 20180210843 - Chang; Mu-Tien ;   et al.
2018-07-26
Optimized Hopscotch Multiple Hash Tables For Efficient Memory In-line Deduplication Application
App 20180181495 - Sala; Frederic ;   et al.
2018-06-28
Optimized hopscotch multiple hash tables for efficient memory in-line deduplication application
Grant 9,983,821 - Sala , et al. May 29, 2
2018-05-29
Interface Method Of Memory System, Interface Circuitry And Memory Module
App 20180144786 - LIM; Sun-Young ;   et al.
2018-05-24
Hybrid memory module and transaction-based memory interface
Grant 9,971,511 - Niu , et al. May 15, 2
2018-05-15
Method To Deliver In-dram Ecc Information Through Ddr Bus
App 20180129561 - NIU; Dimin ;   et al.
2018-05-10
Software Stack And Programming For Dpu Operations
App 20180121130 - LI; Shaungchen ;   et al.
2018-05-03
Dpu Architecture
App 20180122456 - LI; Shaungchen ;   et al.
2018-05-03
Scaling Out Architecture For Dram-based Processing Unit (dpu)
App 20180121120 - Niu; Dimin ;   et al.
2018-05-03
Methods For Addressing High Capacity Sdram-like Memory Without Increasing Pin Cost
App 20180102152 - Chang; Mu-Tien ;   et al.
2018-04-12
Byte-addressable Flash-based Memory Module
App 20180089087 - Chang; Mu-Tien ;   et al.
2018-03-29
Circuits and micro-architecture for a DRAM-based processing unit
Grant 9,922,696 - Li , et al. March 20, 2
2018-03-20
Dram Assist Error Correction Mechanism For Ddr Sdram Interface
App 20180046541 - Niu; Dimin ;   et al.
2018-02-15
Hybrid Memory Controller For Arbitrating Access To Volatile And Non-volatile Memories In A Hybrid Memory Group
App 20180046388 - Niu; Dimin ;   et al.
2018-02-15
System And Method For Controlling A Programmable Deduplication Ratio For A Memory System
App 20180039443 - ZHENG; Hongzhong ;   et al.
2018-02-08
NVDIMM adaptive access mode and smart partition mechanism
Grant 9,886,194 - Zheng , et al. February 6, 2
2018-02-06
Self-optimized Power Management For Ddr-compatible Memory Systems
App 20170365305 - CHANG; Mu-Tien ;   et al.
2017-12-21
Tail response time reduction method for SSD
Grant 9,846,650 - Chang , et al. December 19, 2
2017-12-19
System And Method For Operating A Drr-compatible Asynchronous Memory Module
App 20170357604 - Lim; Sun Young ;   et al.
2017-12-14
Methods for addressing high capacity SDRAM-like memory without increasing pin cost
Grant 9,837,135 - Chang , et al. December 5, 2
2017-12-05
Hybrid memory controller for arbitrating access to volatile and non-volatile memories in a hybrid memory group
Grant 9,830,086 - Niu , et al. November 28, 2
2017-11-28
Memory devices and modules
Grant 9,785,570 - Hu , et al. October 10, 2
2017-10-10
Virtual Bucket Multiple Hash Tables For Efficient Memory In-line Deduplication Application
App 20170286005 - Sala; Frederic ;   et al.
2017-10-05
Optimized Hopscotch Multiple Hash Tables For Efficient Memory In-line Deduplication Application
App 20170286003 - Sala; Frederic ;   et al.
2017-10-05
Smart in-module refresh for DRAM
Grant 9,761,296 - Chang , et al. September 12, 2
2017-09-12
Memory System And Method Of Controlling The Same
App 20170255418 - Niu; Dimin ;   et al.
2017-09-07
Coordinated In-module Ras Features For Synchronous Ddr Compatible Memory
App 20170255383 - CHANG; Mu-Tien ;   et al.
2017-09-07
3-d Stacked Memory With Reconfigurable Compute Logic
App 20170255390 - Chang; Mu-Tien ;   et al.
2017-09-07
Adaptive Mechanism For Synchronized Or Asynchronized Memory Devices
App 20170255398 - Niu; Dimin ;   et al.
2017-09-07
Asynchronous Communication Protocol Compatible With Synchronous Ddr Protocol
App 20170255575 - NIU; Dimin ;   et al.
2017-09-07
Wear Leveling For Storage Or Memory Device
App 20170256305 - Niu; Dimin ;   et al.
2017-09-07
Methods For Addressing High Capacity Sdram-like Memory Without Increasing Pin Cost
App 20170256311 - Chang; Mu-Tien ;   et al.
2017-09-07
Multi-cell Structure For Non-volatile Resistive Memory
App 20170242595 - NIU; Dimin ;   et al.
2017-08-24
Electronic system with partitioning mechanism and method of operation thereof
Grant 9,727,239 - Niu , et al. August 8, 2
2017-08-08
Hybrid Memory Module And Transaction-based Memory Interface
App 20170192686 - NIU; Dimin ;   et al.
2017-07-06
Reliability-aware memory partitioning mechanisms for future memory technologies
Grant 9,696,923 - Niu , et al. July 4, 2
2017-07-04
Transaction-based Hybrid Memory Module
App 20170060434 - CHANG; Mu-Tien ;   et al.
2017-03-02
Smart In-module Refresh For Dram
App 20170040050 - CHANG; Mu-Tien ;   et al.
2017-02-09
Nvdimm Adaptive Access Mode And Smart Partition Mechanism
App 20170017402 - ZHENG; Hongzhong ;   et al.
2017-01-19
Smart In-module Refresh For Dram
App 20160307619 - CHANG; Mu-Tien ;   et al.
2016-10-20
Reliability-aware Memory Partitioning Mechanisms For Future Memory Technologies
App 20160266824 - NIU; Dimin ;   et al.
2016-09-15
Tail Response Time Reduction Method For Ssd
App 20160267011 - CHANG; Mu-Tien ;   et al.
2016-09-15
Memory Devices And Modules
App 20160266975 - HU; Chaohong ;   et al.
2016-09-15
Electronic System With Partitioning Mechanism And Method Of Operation Thereof
App 20160140041 - Niu; Dimin ;   et al.
2016-05-19

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