loadpatents
name:-0.023993015289307
name:-0.034837961196899
name:-0.00048112869262695
Nishtala; Satyanarayana Patent Filings

Nishtala; Satyanarayana

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nishtala; Satyanarayana.The latest application filed is for "high-capacity solid state disk drives".

Company Profile
0.35.20
  • Nishtala; Satyanarayana - Cupertino CA
  • Nishtala; Satyanarayana - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Serial attached storage drive virtualization
Grant 9,582,218 - Nishtala February 28, 2
2017-02-28
System and methods for memory expansion
Grant 9,405,698 - Mazzola , et al. August 2, 2
2016-08-02
High-capacity Solid State Disk Drives
App 20150205541 - Nishtala; Satyanarayana ;   et al.
2015-07-23
System And Methods For Memory Expansion
App 20140331095 - Mazzola; Mario ;   et al.
2014-11-06
System and methods for memory expansion
Grant 8,825,965 - Mazzola , et al. September 2, 2
2014-09-02
Serial Attached Storage Drive Virtualization
App 20140195770 - Nishtala; Satyanarayana
2014-07-10
Method and apparatus for providing power to a server platforms by using a capacitor to provide power during a second power supply transitioning on
Grant 8,732,506 - Nishtala , et al. May 20, 2
2014-05-20
Server power manager and method for dynamically managing server power consumption
Grant 8,689,017 - Nishtala April 1, 2
2014-04-01
System and methods for memory expansion
Grant 8,621,132 - Mazzola , et al. December 31, 2
2013-12-31
Method And Apparatus For Utilizing Nand Flash In A Memory System Hierarchy
App 20130091321 - Nishtala; Satyanarayana ;   et al.
2013-04-11
System and methods for memory expansion
Grant 8,407,394 - Mazzola , et al. March 26, 2
2013-03-26
Method And Apparatus For Improved Power Efficiency For Server Platforms
App 20120303993 - Nishtala; Satyanarayana ;   et al.
2012-11-29
Input-output module for operation in memory module socket and method for extending a memory interface for input-output operations
Grant 8,117,369 - Nishtala , et al. February 14, 2
2012-02-14
Input-output Module For Operation In Memory Module Socket And Method For Extending A Memory Interface For Input-output Operations
App 20110099317 - Nishtala; Satyanarayana ;   et al.
2011-04-28
Input-output module, processing platform and method for extending a memory interface for input-output operations
Grant 7,886,103 - Nishtala , et al. February 8, 2
2011-02-08
Server Power Manager And Method For Dynamically Managing Server Power Consumption
App 20100235662 - Nishtala; Satyanarayana
2010-09-16
Input-output Module, Processing Platform And Method For Extending A Memory Interface For Input-output Operations
App 20100064099 - Nishtala; Satyanarayana ;   et al.
2010-03-11
System And Methods For Memory Expansion
App 20090177849 - Mazzola; Mario ;   et al.
2009-07-09
System And Methods For Memory Expansion
App 20090177861 - Mazzola; Mario ;   et al.
2009-07-09
System And Methods For Memory Expansion
App 20090177853 - Mazzola; Mario ;   et al.
2009-07-09
Composite DMA disk controller for efficient hardware-assisted data transfer operations
Grant 7,219,169 - Lee , et al. May 15, 2
2007-05-15
Method and system for data movement in data storage systems employing parcel-based data mapping
Grant 7,114,014 - Yatziv , et al. September 26, 2
2006-09-26
Method and system for data movement in data storage systems employing parcel-based data mapping
App 20050021888 - Yatziv, Michael ;   et al.
2005-01-27
Method and system for parcel-based data mapping
App 20040268082 - Yatziv, Michael ;   et al.
2004-12-30
Apparatus and method for error detection on source-synchronous buses
Grant 6,834,362 - Nishtala December 21, 2
2004-12-21
Accessing rendered graphics over the internet
App 20040080533 - Nishtala, Satyanarayana ;   et al.
2004-04-29
Composite DMA disk controller for efficient hardware-assisted data transfer operations
App 20040064600 - Lee, Whay Sing ;   et al.
2004-04-01
System for dynamic ordering support in a ringlet serial interconnect
Grant 6,597,665 - Van Loo , et al. July 22, 2
2003-07-22
System for multisized bus coupling in a packet-switched computer system
App 20020194418 - Nishtala, Satyanarayana ;   et al.
2002-12-19
Method and apparatus for defining signal timing for an integrated circuit device
App 20020157072 - Nishtala, Satyanarayana ;   et al.
2002-10-24
Apparatus and method for managing errors on a point-to-point interconnect
App 20020138790 - Nishtala, Satyanarayana
2002-09-26
Apparatus and method for error detection on source-synchronous buses
App 20020138789 - Nishtala, Satyanarayana
2002-09-26
Computer system cooling configuration
Grant 6,272,007 - Kitlas , et al. August 7, 2
2001-08-07
System for multisized bus coupling in a packet-switched computer system
Grant 6,101,565 - Nishtala , et al. August 8, 2
2000-08-08
Method and apparatus for flow control in packet-switched computer system
Grant 5,907,485 - Van Loo , et al. May 25, 1
1999-05-25
Transaction activation processor for controlling memory transaction processing in a packet switched cache coherent multiprocessor system
Grant 5,905,998 - Ebrahim , et al. May 18, 1
1999-05-18
Method and apparatus for interrupt communication in packet-switched microprocessor-based computer system
Grant 5,892,957 - Normoyle , et al. April 6, 1
1999-04-06
System level mechanism for invalidating data stored in the external cache of a processor in a computer system
Grant 5,737,755 - Ebrahim , et al. April 7, 1
1998-04-07
Pipelined distributed bus arbitration system
Grant 5,710,891 - Normoyle , et al. January 20, 1
1998-01-20
Cache coherent computer system that minimizes invalidation and copyback operations
Grant 5,706,463 - Ebrahim , et al. January 6, 1
1998-01-06
Method and apparatus for reducing power consumption in a computer network without sacrificing performance
Grant 5,692,197 - Narad , et al. November 25, 1
1997-11-25
Method and apparatus for interrupt communication in a packet-switched computer system
Grant 5,689,713 - Normoyle , et al. November 18, 1
1997-11-18
Writeback cancellation processing system for use in a packet switched cache coherent multiprocessor system
Grant 5,684,977 - Van Loo , et al. November 4, 1
1997-11-04
Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor
Grant 5,657,472 - Van Loo , et al. August 12, 1
1997-08-12
Transaction activation processor for controlling memory transaction execution in a packet switched cache coherent multiprocessor system
Grant 5,655,100 - Ebrahim , et al. August 5, 1
1997-08-05
Fast, dual ported cache controller for data processors in a packet switched cache coherent multiprocessor system
Grant 5,644,753 - Ebrahim , et al. July 1, 1
1997-07-01
Packet switched cache coherent multiprocessor system
Grant 5,634,068 - Nishtala , et al. May 27, 1
1997-05-27
Parallelized coherent read and writeback transaction processing system for use in a packet switched cache coherent multiprocessor system
Grant 5,581,729 - Nishtala , et al. December 3, 1
1996-12-03
Stacking heatpipe for three dimensional electronic packaging
Grant 5,181,167 - Davidson , et al. January 19, 1
1993-01-19

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