loadpatents
name:-0.050441980361938
name:-0.060048818588257
name:-0.046611070632935
Nishikawa; Masatoshi Patent Filings

Nishikawa; Masatoshi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nishikawa; Masatoshi.The latest application filed is for "three-dimensional memory device containing inter-select-gate electrodes and methods of making the same".

Company Profile
47.55.48
  • Nishikawa; Masatoshi - Nagoya JP
  • Nishikawa; Masatoshi - San Jose CA
  • Nishikawa; Masatoshi - Yokkaichi JP
  • Nishikawa; Masatoshi - Yakkaichi JP
  • Nishikawa; Masatoshi - Kyoto N/A JP
  • NISHIKAWA; Masatoshi - Kyoto-shi JP
  • Nishikawa; Masatoshi - Yokohama N/A JP
  • Nishikawa, Masatoshi - Aichi JP
  • Nishikawa; Masatoshi - Aza-Ohira Sanjoh JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Sub-block size reduction for 3D non-volatile memory
Grant 11,404,122 - Chibvongodze , et al. August 2, 2
2022-08-02
Three-dimensional memory device containing inter-select-gate electrodes and methods of making the same
Grant 11,222,954 - Cui , et al. January 11, 2
2022-01-11
Double write/read throughput by CMOS adjacent array (CaA) NAND memory
Grant 11,189,335 - Nishikawa , et al. November 30, 2
2021-11-30
Three-dimensional Memory Device Containing Inter-select-gate Electrodes And Methods Of Making The Same
App 20210305384 - CUI; Zhixin ;   et al.
2021-09-30
Three-dimensional memory device including different height memory stack structures and methods of making the same
Grant 11,094,715 - Cui , et al. August 17, 2
2021-08-17
Non-volatile memory array driven from both sides for performance improvement
Grant 11,081,185 - Chibvongodze , et al. August 3, 2
2021-08-03
Three-dimensional phase change memory device including vertically constricted current paths and methods of manufacturing the same
Grant 11,043,537 - Takahashi , et al. June 22, 2
2021-06-22
Systems And Methods For Defining Memory Sub-blocks
App 20210173559 - Nishikawa; Masatoshi ;   et al.
2021-06-10
Parallel memory operations in multi-bonded memory device
Grant 11,024,385 - Chibvongodze , et al. June 1, 2
2021-06-01
Three-dimensional flat NAND memory device having curved memory elements and methods of making the same
Grant 11,024,635 - Cui , et al. June 1, 2
2021-06-01
Double Write/read Throughput By Caa Nand
App 20210142841 - Nishikawa; Masatoshi ;   et al.
2021-05-13
Three-dimensional memory device having enhanced contact between polycrystalline channel and epitaxial pedestal structure and method of making the same
Grant 10,991,706 - Nishikawa , et al. April 27, 2
2021-04-27
Three-dimensional memory device having enhanced contact between polycrystalline channel and epitaxial pedestal structure and method of making the same
Grant 10,991,705 - Nishikawa , et al. April 27, 2
2021-04-27
Three-dimensional memory device including laterally constricted current paths and methods of manufacturing the same
Grant 10,964,752 - Takahashi , et al. March 30, 2
2021-03-30
Sub-block Size Reduction For 3d Non-volatile Memory
App 20210082506 - Chibvongodze; Hardwell ;   et al.
2021-03-18
Three-dimensional flat NAND memory device having curved memory elements and methods of making the same
Grant 10,930,674 - Cui , et al. February 23, 2
2021-02-23
Three-dimensional Memory Device Having Enhanced Contact Between Polycrystalline Channel And Epitaxial Pedestal Structure And Method Of Making The Same
App 20210035999 - NISHIKAWA; Masatoshi ;   et al.
2021-02-04
Three-dimensional Memory Device Having Enhanced Contact Between Polycrystalline Channel And Epitaxial Pedestal Structure And Method Of Making The Same
App 20210035998 - NISHIKAWA; Masatoshi ;   et al.
2021-02-04
Sub-block size reduction for 3D non-volatile memory
Grant 10,878,907 - Chibvongodze , et al. December 29, 2
2020-12-29
Non-volatile Memory Array Driven From Both Sides For Performance Improvement
App 20200402587 - Chibvongodze; Hardwell ;   et al.
2020-12-24
Bonded Die Assembly Using A Face-to-back Oxide Bonding And Methods For Making The Same
App 20200402990 - NISHIKAWA; Masatoshi ;   et al.
2020-12-24
Three-dimensional Phase Change Memory Device Including Vertically Constricted Current Paths And Methods Of Manufacturing The Same
App 20200395407 - TAKAHASHI; Yuji ;   et al.
2020-12-17
Three-dimensional Memory Device Including Laterally Constricted Current Paths And Methods Of Manufacturing The Same
App 20200395408 - TAKAHASHI; Yuji ;   et al.
2020-12-17
Sub-block Size Reduction For 3d Non-volatile Memory
App 20200388335 - Chibvongodze; Hardwell ;   et al.
2020-12-10
Three-dimensional memory device containing bit line switches
Grant 10,854,619 - Chibvongodze , et al. December 1, 2
2020-12-01
Parallel Memory Operations In Multi-bonded Memory Device
App 20200365210 - Chibvongodze; Hardwell ;   et al.
2020-11-19
Boost converter in memory chip
Grant 10,839,918 - Chibvongodze , et al. November 17, 2
2020-11-17
Bonded Die Assembly Using A Face-to-back Oxide Bonding And Methods For Making The Same
App 20200335512 - NISHIKAWA; Masatoshi ;   et al.
2020-10-22
Three-dimensional Memory Device Including Different Height Memory Stack Structures And Methods Of Making The Same
App 20200335518 - Cui; Zhixin ;   et al.
2020-10-22
Bonded die assembly using a face-to-back oxide bonding and methods for making the same
Grant 10,797,062 - Nishikawa , et al. October 6, 2
2020-10-06
Three-dimensional Flat Nand Memory Device Having Curved Memory Elements And Methods Of Making The Same
App 20200286903 - Cui; Zhixin ;   et al.
2020-09-10
Three-dimensional Flat Nand Memory Device Having Curved Memory Elements And Methods Of Making The Same
App 20200286915 - Cui; Zhixin ;   et al.
2020-09-10
Three-dimensional Flat Memory Device Including A Dual Dipole Blocking Dielectric Layer And Methods Of Making The Same
App 20200279866 - NISHIKAWA; Masatoshi ;   et al.
2020-09-03
Three-dimensional memory device with locally modulated threshold voltages at drain select levels and methods of making the same
Grant 10,756,106 - Nishikawa , et al. A
2020-08-25
Bonded Assembly Containing Multiple Memory Dies Sharing Peripheral Circuitry On A Support Die And Methods For Making The Same
App 20200266182 - NISHIKAWA; Masatoshi ;   et al.
2020-08-20
Bonded assembly containing multiple memory dies sharing peripheral circuitry on a support die and methods for making the same
Grant 10,741,535 - Nishikawa , et al. A
2020-08-11
Three-dimensional memory device containing drain-select-level air gap and methods of making the same
Grant 10,741,576 - Nishikawa , et al. A
2020-08-11
Three-dimensional memory device including different height memory stack structures and methods of making the same
Grant 10,741,579 - Cui , et al. A
2020-08-11
Three-dimensional memory device containing bit line switches
Grant 10,734,080 - Chibvongodze , et al.
2020-08-04
Three-dimensional flat memory device including a dual dipole blocking dielectric layer and methods of making the same
Grant 10,720,444 - Nishikawa , et al.
2020-07-21
Three-dimensional flat NAND memory device having curved memory elements and methods of making the same
Grant 10,700,090 - Cui , et al.
2020-06-30
Three-dimensional flat NAND memory device having curved memory elements and methods of making the same
Grant 10,700,078 - Cui , et al.
2020-06-30
Three-dimensional Memory Device Containing Bit Line Switches
App 20200185397 - Chibvongodze; Hardwell ;   et al.
2020-06-11
Three-dimensional Memory Device Containing Bit Line Switches
App 20200185039 - Chibvongodze; Hardwell ;   et al.
2020-06-11
Three-dimensional Memory Device Including Different Height Memory Stack Structures And Methods Of Making The Same
App 20200185405 - CUI; Zhixin ;   et al.
2020-06-11
Three-dimensional Memory Device With Locally Modulated Threshold Voltages At Drain Select Levels And Methods Of Making The Same
App 20200168623 - NISHIKAWA; Masatoshi ;   et al.
2020-05-28
Three-dimensional memory device containing capacitor pillars and methods of making the same
Grant 10,629,675 - Nishikawa , et al.
2020-04-21
Three-dimensional memory device including three-dimensional bit line discharge transistors and method of making the same
Grant 10,622,367 - Nishikawa , et al.
2020-04-14
Three-dimensional Memory Device Including Three-dimensional Bit Line Discharge Transistors And Method Of Making The Same
App 20200098771 - NISHIKAWA; Masatoshi ;   et al.
2020-03-26
Three-dimensional memory device containing multilevel drain select gate isolation and methods of making the same
Grant 10,600,800 - Nishikawa , et al.
2020-03-24
Three-dimensional memory device containing dummy antenna diodes
Grant 10,580,787 - Nishikawa , et al.
2020-03-03
Three-dimensional Memory Device Containing Drain-selct-level Air Gap And Methods Of Making The Same
App 20200058673 - NISHIKAWA; Masatoshi ;   et al.
2020-02-20
Three-dimensional Flat Memory Device Including A Dual Dipole Blocking Dielectric Layer And Methods Of Making The Same
App 20200058672 - NISHIKAWA; Masatoshi ;   et al.
2020-02-20
Three-dimensional memory device containing source contact to bottom of vertical channels and method of making the same
Grant 10,559,582 - Nishikawa , et al. Feb
2020-02-11
Three-dimensional Memory Device Containing Multilevel Drain Select Gate Isolation And Methods Of Making The Same
App 20200006358 - NISHIKAWA; Masatoshi ;   et al.
2020-01-02
Three-dimensional NAND memory containing dual protrusion charge trapping regions and methods of manufacturing the same
Grant 10,516,025 - Nishikawa , et al. Dec
2019-12-24
Three-dimensional memory device containing hydrogen diffusion blocking structures and method of making the same
Grant 10,515,897 - Nishikawa , et al. Dec
2019-12-24
Three-dimensional Nand Memory Containing Dual Protrusion Charge Trapping Regions And Methods Of Manufacturing The Same
App 20190386108 - NISHIKAWA; Masatoshi ;   et al.
2019-12-19
Three-dimensional Memory Device Containing Antenna Diodes And Method Of Making Thereof
App 20190371800 - NISHIKAWA; Masatoshi ;   et al.
2019-12-05
Three-dimensional Memory Device Containing Source Contact To Bottom Of Vertical Channels Of And Method Of Making The Same
App 20190371807 - NISHIKAWA; Masatoshi ;   et al.
2019-12-05
Three-dimensional Memory Device Containing Hydrogen Diffusion Blocking Structures And Method Of Making The Same
App 20190355663 - NISHIKAWA; Masatoshi ;   et al.
2019-11-21
Three-dimensional memory device containing multilevel drain select gate isolation and methods of making the same
Grant 10,475,804 - Nishikawa , et al. Nov
2019-11-12
Three-dimensional flat NAND memory device including concave word lines and method of making the same
Grant 10,381,376 - Nishikawa , et al. A
2019-08-13
Three-dimensional memory device containing bonded chip assembly with through-substrate via structures and method of making the same
Grant 10,354,980 - Mushiga , et al. July 16, 2
2019-07-16
Three-dimensional memory device containing bonded chip assembly with through-substrate via structures and method of making the same
Grant 10,354,987 - Mushiga , et al. July 16, 2
2019-07-16
Vertical resistor in 3D memory device with two-tier stack
Grant 9,941,297 - Nishikawa , et al. April 10, 2
2018-04-10
Within array replacement openings for a three-dimensional memory device
Grant 9,935,123 - Nishikawa , et al. April 3, 2
2018-04-03
Split memory cells with unsplit select gates in a three-dimensional memory device
Grant 9,935,124 - Nishikawa , et al. April 3, 2
2018-04-03
Epitaxial source region for uniform threshold voltage of vertical transistors in 3D memory devices
Grant 9,911,748 - Nishikawa , et al. March 6, 2
2018-03-06
Field effect transistor with elevated active regions and methods of manufacturing the same
Grant 9,859,422 - Nishikawa , et al. January 2, 2
2018-01-02
3D semicircular vertical NAND string with recessed inactive semiconductor channel sections
Grant 9,837,431 - Nishikawa , et al. December 5, 2
2017-12-05
Three dimensional NAND device containing dielectric pillars for a buried source line and method of making thereof
Grant 9,799,670 - Nishikawa , et al. October 24, 2
2017-10-24
Vertical Resistor In 3D Memory Device With Two-Tier Stack
App 20170263642 - Nishikawa; Masatoshi ;   et al.
2017-09-14
Vertical resistor in 3D memory device with two-tier stack
Grant 9,691,781 - Nishikawa , et al. June 27, 2
2017-06-27
Vertical Resistor In 3d Memory Device With Two-tier Stack
App 20170162592 - Nishikawa; Masatoshi ;   et al.
2017-06-08
Split Memory Cells With Unsplit Select Gates In A Three-dimensional Memory Device
App 20170148809 - NISHIKAWA; Masatoshi ;   et al.
2017-05-25
Within Array Replacement Openings For A Three-dimensional Memory Device
App 20170148808 - NISHIKAWA; Masatoshi ;   et al.
2017-05-25
3d Semicircular Vertical Nand String With Recessed Inactive Semiconductor Channel Sections
App 20170148805 - NISHIKAWA; Masatoshi ;   et al.
2017-05-25
Three Dimensional Nand Device Containing Dielectric Pillars For A Buried Source Line And Method Of Making Thereof
App 20170148800 - NISHIKAWA; Masatoshi ;   et al.
2017-05-25
Passive devices for integration with three-dimensional memory devices
Grant 9,646,981 - Nishikawa , et al. May 9, 2
2017-05-09
Field Effect Transistor With A Multilevel Gate Electrode For Integration With A Multilevel Memory Device
App 20170125430 - NISHIKAWA; Masatoshi ;   et al.
2017-05-04
Field effect transistor with a multilevel gate electrode for integration with a multilevel memory device
Grant 9,620,512 - Nishikawa , et al. April 11, 2
2017-04-11
Bookbinding apparatus
Grant 9,616,698 - Noguchi , et al. April 11, 2
2017-04-11
Epitaxial Source Region For Uniform Threshold Voltage Of Vertical Transistors In 3d Memory Devices
App 20170092654 - NISHIKAWA; Masatoshi ;   et al.
2017-03-30
Passive devices for integration with three-dimensional memory devices
Grant 9,589,981 - Nishikawa , et al. March 7, 2
2017-03-07
Passive Devices For Integration With Three-dimensional Memory Devices
App 20160365352 - NISHIKAWA; Masatoshi ;   et al.
2016-12-15
Passive Devices For Integration With Three-dimensional Memory Devices
App 20160365351 - NISHIKAWA; Masatoshi ;   et al.
2016-12-15
Field Effect Transistor With Elevated Active Regions And Methods Of Manufacturing The Same
App 20160351709 - NISHIKAWA; Masatoshi ;   et al.
2016-12-01
Bookbinding Apparatus
App 20140321948 - NOGUCHI; Yoshihiro ;   et al.
2014-10-30
Semiconductor device
Grant 8,563,382 - Nishikawa October 22, 2
2013-10-22
Method of manufacturing semiconductor device
Grant 8,409,958 - Ookoshi , et al. April 2, 2
2013-04-02
Method of manufacturing semiconductor device
Grant 8,329,570 - Fukuda , et al. December 11, 2
2012-12-11
Semiconductor device
Grant 8,222,706 - Nishikawa July 17, 2
2012-07-17
Semiconductor Device
App 20120164806 - NISHIKAWA; Masatoshi
2012-06-28
Method Of Manufacturing Semiconductor Device
App 20120058610 - Ookoshi; Katsuaki ;   et al.
2012-03-08
Method Of Manufacturing Semiconductor Device
App 20110250748 - Fukuda; Masahiro ;   et al.
2011-10-13
Semiconductor Device
App 20110057270 - NISHIKAWA; Masatoshi
2011-03-10
Glueing device in bookbinding
App 20030010284 - Nishikawa, Masatoshi ;   et al.
2003-01-16
Plastic scissors with metallic cutting inserts
Grant 4,250,620 - Nishikawa February 17, 1
1981-02-17

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