Nishi; Hiroaki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nishi; Hiroaki.The latest application filed is for "anonymization system, issuance device, and program".

Company Profile

1.7.7

Nishi; Hiroaki - Kanagawa JP
Nishi; Hiroaki - Yokohama JP
Nishi; Hiroaki - Kawasaki JP
Nishi; Hiroaki - Yokohama-shi JP
Nishi, Hiroaki - Hachioji JP
Nishi; Hiroaki - Chiba JP
Nishi; Hiroaki - Matsudo JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Anonymization system, issuance device, and storage medium Grant 10,303,897 - Nishi , et al.	2019-05-28
Anonymization System, Issuance Device, And Program App 20170068828 - NISHI; Hiroaki ; et al.	2017-03-09
Apparatus For Semiconductor Integrated Circuit, Design Method For Semiconductor Integrated Circuit, And Semiconductor Integrated Circuit App 20120112827 - Nishi; Hiroaki	2012-05-10
Apparatus, method and program for behavioral synthesis including loop processing Grant 7,318,213 - Nishi January 8, 2	2008-01-08
Method for co-verifying hardware and software for a semiconductor device Grant 7,155,690 - Yamashita , et al. December 26, 2	2006-12-26
Apparatus, method and program for behavioral synthesis including loop processing App 20060288337 - Nishi; Hiroaki	2006-12-21
Skew compensation method Grant 7,127,645 - Toyoda , et al. October 24, 2	2006-10-24
Instruction generator, method for generating instructions and computer program product that executes an application for an instruction generator App 20060195828 - Nishi; Hiroaki ; et al.	2006-08-31
Hardware/software co-verification method App 20050149897 - Yamashita, Hiroyuki ; et al.	2005-07-07
Skew compensation method App 20040123190 - Toyoda, Hidehiro ; et al.	2004-06-24
Classified communication system which classifies the signal between interfaces and supports a media transport encoding scheme for a direct current balanced stream simultaneously App 20030223587 - Nishi, Hiroaki	2003-12-04
Test assistant system for logical design process Grant 5,282,146 - Aihara , et al. January 25, 1	1994-01-25
Integrated semiconductor circuit device Grant 4,746,965 - Nishi May 24, 1	1988-05-24
Method for treating sugar solution Grant 4,427,454 - Oyama , et al. January 24, 1	1984-01-24

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