loadpatents
name:-0.15138387680054
name:-0.22327184677124
name:-0.44779801368713
Nieh; Chun-Feng Patent Filings

Nieh; Chun-Feng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nieh; Chun-Feng.The latest application filed is for "gate structure of semiconductor device and method of manufacture".

Company Profile
31.74.93
  • Nieh; Chun-Feng - Hsinchu TW
  • Nieh; Chun-Feng - Hsinchu City TW
  • Nieh; Chun-Feng - Hsin-Chu TW
  • Nieh; Chun-Feng - Hsinchu County N/A TW
  • Nieh; Chun-Feng - Baoshan Township TW
  • Nieh; Chun-Feng - Hsinchu Hsien TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Gate Structure Of Semiconductor Device And Method Of Manufacture
App 20220310405 - Wang; Tsan-Chun ;   et al.
2022-09-29
Reduce Well Dopant Loss in FinFETs Through Co-Implantation
App 20220301874 - Liu; Sih-Jie ;   et al.
2022-09-22
FinFET device and methods of forming
Grant 11,450,757 - Lin , et al. September 20, 2
2022-09-20
Method of forming a semiconductor device with implantation of impurities at high temperature
Grant 11,450,743 - Wang , et al. September 20, 2
2022-09-20
Semiconductor Device And Manufacturing Method Thereof
App 20220262644 - Chang; Tien-Shun ;   et al.
2022-08-18
Semiconductor device and manufacturing method thereof
Grant 11,367,621 - Chang , et al. June 21, 2
2022-06-21
Gate structure of semiconductor device and method of manufacture
Grant 11,361,977 - Wang , et al. June 14, 2
2022-06-14
Ion implantation for nano-FET
Grant 11,348,835 - Lin , et al. May 31, 2
2022-05-31
Reduce well dopant loss in FinFETs through co-implantation
Grant 11,348,792 - Liu , et al. May 31, 2
2022-05-31
Method of Implantation for Semiconductor Device
App 20220123111 - Wang; Bau-Ming ;   et al.
2022-04-21
Method And Device To Reduce Epitaxial Defects Due To Contact Stress Upon A Semicondcutor Wafer
App 20220059394 - LIU; Sih-Jie ;   et al.
2022-02-24
Ion Implantation for Nano-FET
App 20220037465 - Lin; Yu-Chang ;   et al.
2022-02-03
Warm Wafer After Ion Cryo-implantation
App 20220028707 - Lin; Yu-Chang ;   et al.
2022-01-27
Semiconductor Device And Manufacturing Method Thereof
App 20210391182 - Chang; Tien-Shun ;   et al.
2021-12-16
Dual Dopant Source/drain Regions And Methods Of Forming Same
App 20210375687 - Lin; Yu-Chang ;   et al.
2021-12-02
Semiconductor Device with Implant and Method of Manufacturing Same
App 20210367038 - Lin; Yu-Chang ;   et al.
2021-11-25
Implantation And Annealing For Semiconductor Device
App 20210328044 - Lin; Yu-Chang ;   et al.
2021-10-21
Method Of Manufacturing Semiconductor Devices
App 20210313456 - WANG; Tsan-Chun ;   et al.
2021-10-07
Gradient doped region of recessed Fin forming a FinFET device
Grant 11,133,415 - Lin , et al. September 28, 2
2021-09-28
Formation of semiconductor device structure by implantation
Grant 11,127,817 - Wang , et al. September 21, 2
2021-09-21
Method For Fabricating A Semiconductor Device
App 20210272850 - WANG; Tsan-Chun ;   et al.
2021-09-02
Semiconductor device with implant and method of manufacturing same
Grant 11,088,249 - Lin , et al. August 10, 2
2021-08-10
Implantation and annealing for semiconductor device
Grant 11,056,573 - Lin , et al. July 6, 2
2021-07-06
Reduce Well Dopant Loss in FinFETs Through Co-Implantation
App 20210202253 - Liu; Sih-Jie ;   et al.
2021-07-01
Method of manufacturing semiconductor devices
Grant 11,043,580 - Wang , et al. June 22, 2
2021-06-22
Method for fabricating a semiconductor device
Grant 11,031,293 - Wang , et al. June 8, 2
2021-06-08
Enhanced Channel Strain To Reduce Contact Resistance In Nmos Fet Devices
App 20210159226 - LIN; Yu-Chang ;   et al.
2021-05-27
Method for fabricating a semiconductor device
Grant 11,011,428 - Wang , et al. May 18, 2
2021-05-18
Semiconductor Device with Implant and Method of Manufacturing Same
App 20210083056 - Lin; Yu-Chang ;   et al.
2021-03-18
Reduce well dopant loss in FinFETs through co-implantation
Grant 10,930,507 - Liu , et al. February 23, 2
2021-02-23
Enhanced channel strain to reduce contact resistance in NMOS FET devices
Grant 10,916,546 - Lin , et al. February 9, 2
2021-02-09
FinFET Device and Methods of Forming
App 20200411672 - Lin; Yu-Chang ;   et al.
2020-12-31
Implantation and Annealing for Semiconductor Device
App 20200395462 - Lin; Yu-Chang ;   et al.
2020-12-17
Gradient Doped Region of Recessed Fin Forming a FinFET Device
App 20200395481 - Lin; Jyun-Hao ;   et al.
2020-12-17
Gate Structure Of Semiconductor Device And Method Of Manufacture
App 20200365414 - Wang; Tsan-Chun ;   et al.
2020-11-19
Method and apparatus for forming semiconductor structure
Grant 10,832,913 - Wang , et al. November 10, 2
2020-11-10
FinFET device and methods of forming
Grant 10,770,570 - Lin , et al. Sep
2020-09-08
Gradient doped region of recessed fin forming a FinFET device
Grant 10,763,363 - Lin , et al. Sep
2020-09-01
Gate structure of semiconductor device
Grant 10,741,412 - Wang , et al. A
2020-08-11
Mask formation by selectively removing portions of a layer that have not been implanted
Grant 10,714,344 - Chang , et al.
2020-07-14
Method of manufacturing semiconductor device
Grant 10,714,598 - Wang , et al.
2020-07-14
Method Of Manufacturing Semiconductor Devices
App 20200203507 - WANG; Tsan-Chun ;   et al.
2020-06-25
Enhanced Channel Strain To Reduce Contact Resistance In Nmos Fet Devices
App 20200135736 - LIN; Yu-Chang ;   et al.
2020-04-30
Reduce Well Dopant Loss in FinFETs Through Co-Implantation
App 20200135469 - Liu; Sih-Jie ;   et al.
2020-04-30
Mask Formation by Selectively Removing Portions of a Layer That Have Not Been Implanted
App 20200058505 - Chang; Tien-Shun ;   et al.
2020-02-20
Method For Fabricating A Semiconductor Device
App 20200051865 - WANG; Tsan-Chun ;   et al.
2020-02-13
Method For Fabricating A Semiconductor Device
App 20200051864 - WANG; Tsan-Chun ;   et al.
2020-02-13
Formation Of Semiconductor Device Structure By Implantation
App 20200020772 - WANG; Tsan-Chun ;   et al.
2020-01-16
FinFET structures and methods of forming the same
Grant 10,529,861 - Lin , et al. J
2020-01-07
Enhanced channel strain to reduce contact resistance in NMOS FET devices
Grant 10,515,966 - Lin , et al. Dec
2019-12-24
Semiconductor structure and method for manufacturing the same
Grant 10,510,619 - Lin , et al. Dec
2019-12-17
Mask formation by selectively removing portions of a layer that have not been implanted
Grant 10,460,940 - Chang , et al. Oc
2019-10-29
Gradient Doped Region of Recessed Fin Forming a FinFET Device
App 20190312143 - LIN; Jyun-Hao ;   et al.
2019-10-10
Mask Formation By Selectively Removing Portions Of A Layer That Have Not Been Implanted
App 20190287802 - CHANG; Tien-Shun ;   et al.
2019-09-19
Method And Apparatus For Forming Semiconductor Structure
App 20190252192 - WANG; TSAN-CHUN ;   et al.
2019-08-15
FinFET device and methods of forming
Grant 10,326,003 - Chen , et al.
2019-06-18
Semiconductor Structure And Method For Manufacturing The Same
App 20190157163 - LIN; YU-CHANG ;   et al.
2019-05-23
Semiconductor Device and Method of Manufacture
App 20190088498 - Wang; Tsan-Chun ;   et al.
2019-03-21
FinFET Device and Methods of Forming
App 20190067458 - Lin; Yu-Chang ;   et al.
2019-02-28
Method Of Manufacturing Semiconductor Device
App 20190006492 - WANG; Tsan-Chun ;   et al.
2019-01-03
Enhanced Channel Strain To Reduce Contact Resistance In Nmos Fet Devices
App 20190006363 - LIN; Yu-Chang ;   et al.
2019-01-03
Semiconductor device and method of manufacture
Grant 10,163,657 - Wang , et al. Dec
2018-12-25
Method of forming ultra-shallow junctions in semiconductor devices
Grant 10,128,115 - Nieh , et al. November 13, 2
2018-11-13
finFET device and methods of forming
Grant 10,115,808 - Lin , et al. October 30, 2
2018-10-30
Enhanced channel strain to reduce contact resistance in NMOS FET devices
Grant 10,056,383 - Lin , et al. August 21, 2
2018-08-21
High temperature intermittent ion implantation
Grant 10,049,856 - Wu , et al. August 14, 2
2018-08-14
Finfet Device And Methods Of Forming
App 20180151706 - Lin; Yu-Chang ;   et al.
2018-05-31
FINFET Device and Methods of Forming
App 20180151701 - Chen; Chia-Cheng ;   et al.
2018-05-31
FinFET Structures and Methods of Forming the Same
App 20180145177 - Lin; Yu-Chang ;   et al.
2018-05-24
III-V multi-channel FinFETs
Grant 9,741,800 - Lin , et al. August 22, 2
2017-08-22
Method of manufacturing strained source/drain structures
Grant 9,698,057 - Nieh , et al. July 4, 2
2017-07-04
Enhanced Channel Strain To Reduce Contact Resistance In Nmos Fet Devices
App 20170179130 - LIN; Yu-Chang ;   et al.
2017-06-22
Semiconductor device and method of making
Grant 9,653,581 - Lu , et al. May 16, 2
2017-05-16
Formation of high quality Fin in 3D structure by way of two-step implantation
Grant 9,634,126 - Nieh , et al. April 25, 2
2017-04-25
Enhanced channel strain to reduce contact resistance in NMOS FET devices
Grant 9,607,838 - Lin , et al. March 28, 2
2017-03-28
Enhanced Channel Strain To Reduce Contact Resistance In Nmos Fet Devices
App 20170084741 - LIN; Yu-Chang ;   et al.
2017-03-23
Methods for introducing carbon to a semiconductor structure and structures formed thereby
Grant 9,525,024 - Su , et al. December 20, 2
2016-12-20
Formation Of High Quality Fin In 3d Structure By Way Of Two-step Implantation
App 20160343831 - Nieh; Chun-Feng ;   et al.
2016-11-24
High Temperature Intermittent Ion Implantation
App 20160260580 - Wu; Hsin-Wei ;   et al.
2016-09-08
Formation of high quality fin in 3D structure by way of two-step implantation
Grant 9,425,290 - Nieh , et al. August 23, 2
2016-08-23
Method for improving selectivity of epi process
Grant 9,373,695 - Chen , et al. June 21, 2
2016-06-21
Semiconductor Device And Method Of Making
App 20160141394 - Lu; Wen-Tai ;   et al.
2016-05-19
High temperature intermittent ion implantation
Grant 9,343,312 - Wu , et al. May 17, 2
2016-05-17
Semiconductor device and method of making
Grant 9,252,271 - Lu , et al. February 2, 2
2016-02-02
High Temperature Intermittent Ion Implantation
App 20160027646 - Wu; Hsin-Wei ;   et al.
2016-01-28
Fabrication of ultra-shallow junctions
Grant 9,202,693 - Wang , et al. December 1, 2
2015-12-01
III-V Multi-Channel FinFETs
App 20150340473 - Lin; Hung-Ta ;   et al.
2015-11-26
Formation Of High Quality Fin In 3d Structure By Way Of Two-step Implantation
App 20150340472 - Nieh; Chun-Feng ;   et al.
2015-11-26
Methods for Introducing Carbon to a Semiconductor Structure and Structures Formed Thereby
App 20150325644 - Su; Yu-Chen ;   et al.
2015-11-12
Method of Manufacturing Strained Source/Drain Structures
App 20150262886 - Nieh; Chun-Feng ;   et al.
2015-09-17
Semiconductor device with conformal doping and method of making
Grant 9,123,564 - Lin , et al. September 1, 2
2015-09-01
Formation of High Quality Fin in 3D Structure by Way of Two-Step Implantation
App 20150228766 - Nieh; Chun-Feng ;   et al.
2015-08-13
Methods for introducing carbon to a semiconductor structure
Grant 9,105,570 - Su , et al. August 11, 2
2015-08-11
Formation of high quality fin in 3D structure by way of two-step implantation
Grant 9,099,495 - Nieh , et al. August 4, 2
2015-08-04
III-V multi-channel FinFETs
Grant 9,099,388 - Lin , et al. August 4, 2
2015-08-04
Semiconductor Device With Conformal Doping And Method Of Making
App 20150162330 - Lin; Yu-Chang ;   et al.
2015-06-11
Method of manufacturing strained source/drain structures
Grant 9,048,253 - Nieh , et al. June 2, 2
2015-06-02
Semiconductor Device And Method Of Making
App 20150145066 - Lu; Wen-Tai ;   et al.
2015-05-28
Fabrication Of Ultra-shallow Junctions
App 20140213047 - WANG; Li-Ting ;   et al.
2014-07-31
Method of Manufacturing Strained Source/Drain Structures
App 20140024188 - Nieh; Chun-Feng ;   et al.
2014-01-23
Methods for Introducing Carbon to a Semiconductor Structure and Structures Formed Thereby
App 20140015104 - Su; Yu-Chen ;   et al.
2014-01-16
Junction leakage reduction through implantation
Grant 8,629,013 - Nieh , et al. January 14, 2
2014-01-14
Forming a protective film on a back side of a silicon wafer in a III-V family fabrication process
Grant 8,629,037 - Nieh , et al. January 14, 2
2014-01-14
Method For Improving Selectivity Of EPI Process
App 20130299876 - Chen; Kuan-Yu ;   et al.
2013-11-14
Method of manufacturing strained source/drain structures
Grant 8,569,139 - Nieh , et al. October 29, 2
2013-10-29
Method of making a FinFET device
Grant 8,497,177 - Chang , et al. July 30, 2
2013-07-30
Method for improving selectivity of epi process
Grant 8,487,354 - Chen , et al. July 16, 2
2013-07-16
Method For Forming High Mobility Channels In Iii-v Family Channel Devices
App 20130137238 - NIEH; Chun-Feng ;   et al.
2013-05-30
III-V Multi-Channel FinFETs
App 20130099283 - Lin; Hung-Ta ;   et al.
2013-04-25
Junction Leakage Reduction Through Implantation
App 20130095642 - Nieh; Chun-Feng ;   et al.
2013-04-18
Forming A Protective Film On A Back Side Of A Silicon Wafer In A Iii-v Family Fabrication Process
App 20130078783 - Nieh; Chun-Feng ;   et al.
2013-03-28
Multi-strained source/drain structures
Grant 8,405,160 - Cheng , et al. March 26, 2
2013-03-26
Source/drain carbon implant and RTA anneal, pre-SiGe deposition
Grant 8,404,546 - Woon , et al. March 26, 2
2013-03-26
Method of enhancing dopant activation without suffering additional dopant diffusion
Grant 8,273,633 - Kuo , et al. September 25, 2
2012-09-25
Shallow junction formation and high dopant activation rate of MOS devices
Grant 8,212,253 - Nieh , et al. July 3, 2
2012-07-03
Method Of Manufacturing Strained Source/drain Structures
App 20120108026 - NIEH; Chun-Feng ;   et al.
2012-05-03
Method Of Forming Ultra-shallow Junctions In Semiconductor Devices
App 20120100686 - LU; Wei-Yuan ;   et al.
2012-04-26
Shallow Junction Formation and High Dopant Activation Rate of MOS Devices
App 20110316079 - Nieh; Chun-Feng ;   et al.
2011-12-29
Multi-strained Source/drain Structures
App 20110291201 - Cheng; Chun-Fai ;   et al.
2011-12-01
Shallow junction formation and high dopant activation rate of MOS devices
Grant 8,039,375 - Nieh , et al. October 18, 2
2011-10-18
High Temperature Implantation Method For Stressor Formation
App 20110212590 - Wu; Chii-Ming ;   et al.
2011-09-01
Method Of Forming Ultra-shallow Junctions In Semiconductor Devices
App 20110212592 - NIEH; Chun-Feng ;   et al.
2011-09-01
Method for obtaining quality ultra-shallow doped regions and device having same
Grant 7,994,016 - Tsai , et al. August 9, 2
2011-08-09
Method For Obtaining Quality Ultra-shallow Doped Regions And Device Having Same
App 20110111571 - TSAI; Chun Hsiung ;   et al.
2011-05-12
Method For Improving Selectivity Of Epi Process
App 20110042729 - Chen; Kuan-Yu ;   et al.
2011-02-24
Reducing Local Mismatch of Devices Using Cryo-Implantation
App 20110039390 - Nieh; Chun-Feng ;   et al.
2011-02-17
Source/Drain Carbon Implant and RTA Anneal, Pre-SiGe Deposition
App 20110027955 - Woon; Wei-Yen ;   et al.
2011-02-03
Source/drain carbon implant and RTA anneal, pre-SiGe deposition
Grant 7,838,887 - Woon , et al. November 23, 2
2010-11-23
Semiconductor device having ultra-shallow and highly activated source/drain extensions
Grant 7,741,699 - Ku , et al. June 22, 2
2010-06-22
Source/Drain Carbon Implant and RTA Anneal, Pre-SiGe Deposition
App 20090273034 - Woon; Wei-Yen ;   et al.
2009-11-05
Super anneal for process induced strain modulation
Grant 7,528,028 - Liang , et al. May 5, 2
2009-05-05
Short channel effect engineering in MOS device using epitaxially carbon-doped silicon
Grant 7,504,292 - Ku , et al. March 17, 2
2009-03-17
Profile confinement to improve transistor performance
Grant 7,498,642 - Chen , et al. March 3, 2
2009-03-03
Advanced activation approach for MOS devices
Grant 7,494,857 - Chen , et al. February 24, 2
2009-02-24
Junction leakage reduction in SiGe process by implantation
Grant 7,482,211 - Nieh , et al. January 27, 2
2009-01-27
Shallow junction formation and high dopant activation rate of MOS devices
App 20080293204 - Nieh; Chun-Feng ;   et al.
2008-11-27
Method Of Enhancing Dopant Activation Without Suffering Additional Dopant Diffusion
App 20080242039 - Ku; Keh-Chiang ;   et al.
2008-10-02
Advanced activation approach for MOS devices
App 20080160709 - Chen; Chien-Hao ;   et al.
2008-07-03
Short channel effect engineering in MOS device using epitaxially carbon-doped silicon
App 20080132019 - Ku; Keh-Chiang ;   et al.
2008-06-05
Junction leakage reduction in SiGe process by implantation
App 20070298565 - Nieh; Chun-Feng ;   et al.
2007-12-27
Junction leakage reduction in SiGe process by tilt implantation
App 20070298557 - Nieh; Chun-Feng ;   et al.
2007-12-27
Ultra-shallow and highly activated source/drain extension formation using phosphorus
App 20070284615 - Ku; Keh-Chiang ;   et al.
2007-12-13
Shallow source/drain regions for CMOS transistors
App 20070037326 - Chen; Chien-Hao ;   et al.
2007-02-15
Method of forming a MOS device having a strained channel region
App 20070010073 - Chen; Chien-Hao ;   et al.
2007-01-11
Impurity co-implantation to improve transistor performance
App 20060284249 - Chen; Chien-Hao ;   et al.
2006-12-21
Super anneal for process induced strain modulation
App 20060286758 - Liang; Mong Song ;   et al.
2006-12-21
Method of forming the N-MOS and P-MOS gates of a CMOS semiconductor device
App 20060263992 - Chen; Chien-Hao ;   et al.
2006-11-23
Profile confinement to improve transistor performance
App 20060244080 - Chen; Chien-Hao ;   et al.
2006-11-02
Methods and systems for rapid thermal processing
App 20060035477 - Mai; Karen ;   et al.
2006-02-16
Method of fabricating stacked gate dielectric layer
App 20040241948 - Nieh, Chun-Feng ;   et al.
2004-12-02
Method of etching a metal line
App 20040166691 - Nieh, Chun-Feng ;   et al.
2004-08-26
Method of fabricating a shallow trench isolation structure
App 20040142562 - Chen, Zhen-Long ;   et al.
2004-07-22
Method of etching a low-k dielectric layer
App 20040121604 - Nieh, Chun-Feng ;   et al.
2004-06-24

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed