Nguyen; Trinh Huy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nguyen; Trinh Huy.The latest application filed is for "data dump formatting utilizing dynamically created control structures".

Company Profile

3.9.8

Nguyen; Trinh Huy - San Jose CA
Nguyen; Trinh Huy - Round Rock TX
Nguyen; Trinh Huy - Pflugerville TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Data dump formatting utilizing dynamically created control structures Grant 11,409,759 - Nguyen , et al. August 9, 2	2022-08-09
Dynamically managing a table of contents Grant 10,564,874 - Koester , et al. Feb	2020-02-18
Data Dump Formatting Utilizing Dynamically Created Control Structures App 20190155814 - Nguyen; Trinh Huy ; et al.	2019-05-23
Data dump formatting utilizing dynamically created control structures Grant 10,242,078 - Nguyen , et al.	2019-03-26
Dynamically Managing A Table Of Contents App 20180232170 - Koester; Michael J. ; et al.	2018-08-16
Dynamically managing a table of contents Grant 9,996,294 - Koester , et al. June 12, 2	2018-06-12
Data Dump Formatting Utilizing Dynamically Created Control Structures App 20170277760 - Nguyen; Trinh Huy ; et al.	2017-09-28
Dynamically Managing A Table Of Contents App 20170220288 - Koester; Michael J. ; et al.	2017-08-03
Data processing system with latency tolerance execution Grant 9,135,014 - Tran , et al. September 15, 2	2015-09-15
Data Processing System With Latency Tolerance Execution App 20130212358 - Tran; Thang M. ; et al.	2013-08-15
Data Processing System With Latency Tolerance Execution App 20120303936 - Tran; Thang M. ; et al.	2012-11-29
Method and apparatus for implementing signed multiplication of operands having differing bit widths without sign extension of the multiplicand Grant 6,973,471 - Nguyen December 6, 2	2005-12-06
Method and apparatus for implementing signed multiplication of operands having differing bit widths without sign extension of the multiplicand App 20030163503 - Nguyen, Trinh Huy	2003-08-28
System and method for indicating that a processor has prefetched data into a primary cache and not into a secondary cache Grant 5,758,119 - Mayfield , et al. May 26, 1	1998-05-26
Modified L1/L2 cache inclusion for aggressive prefetch Grant 5,740,399 - Mayfield , et al. April 14, 1	1998-04-14

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.