Nguyen; Bich-Yen

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nguyen; Bich-Yen.The latest application filed is for "semiconductor structure for digital and radiofrequency applications, and method for manufacturing such a structure".

Company Profile

3.135.112

Nguyen; Bich-Yen - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Structure For Digital And Radiofrequency Applications App 20220076992 - Morandini; Yvan ; et al.	2022-03-10
Semiconductor Structure For Digital And Radiofrequency Applications, And Method For Manufacturing Such A Structure App 20220076993 - Morandini; Yvan ; et al.	2022-03-10
Method for manufacturing a structure for forming a tridimensional monolithic integrated circuit Grant 11,205,702 - Figuet , et al. December 21, 2	2021-12-21
Method for manufacturing a semiconductor structure Grant 11,156,778 - Nguyen , et al. October 26, 2	2021-10-26
Method for fabrication of a semiconductor structure including an interposer free from any through via Grant 11,114,314 - Nguyen , et al. September 7, 2	2021-09-07
Method For Manufacturing A Cfet Device App 20210202326 - Schwarzenbach; Walter ; et al.	2021-07-01
Method For Fabrication Of A Semiconductor Structure Including An Interposer Free From Any Through Via App 20200328094 - Nguyen; Bich-Yen ; et al.	2020-10-15
Method For Manufacturing A Structure For Forming A Tridimensional Monolithic Integrated Circuit App 20200295138 - Figuet; Christophe ; et al.	2020-09-17
Method For Manufacturing A Semiconductor Structure App 20190187376 - Nguyen; Bich-Yen ; et al.	2019-06-20
Method for manufacturing a high-resistivity semiconductor-on-insulator substrate including an RF circuit overlapping a doped region in the substrate Grant 10,002,882 - Nguyen , et al. June 19, 2	2018-06-19
Structure for radiofrequency applications and process for manufacturing such a structure Grant 9,824,915 - Nguyen , et al. November 21, 2	2017-11-21
Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures Grant 9,818,874 - Nguyen , et al. November 14, 2	2017-11-14
Structure For Radiofrequency Applications And Process For Manufacturing Such A Structure App 20170084478 - Nguyen; Bich-Yen ; et al.	2017-03-23
Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers Grant 9,576,798 - Nguyen , et al. February 21, 2	2017-02-21
Method For Manufacturing A High-resistivity Semiconductor-on-insulator Substrate App 20160372484 - Nguyen; Bich-Yen ; et al.	2016-12-22
Pseudo-inverter circuit with multiple independent gate transistors Grant 9,496,877 - Mazure , et al. November 15, 2	2016-11-15
Method For Fabricating Semiconductor Structures Including Fin Structures With Different Strain States, And Related Semiconductor Structures App 20160268430 - Nguyen; Bich-Yen ; et al.	2016-09-15
Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures Grant 9,349,865 - Nguyen , et al. May 24, 2	2016-05-24
Method For Fabricating Semiconductor Layers Including Transistor Channels Having Different Strain States, And Related Semiconductor Layers App 20160086803 - Nguyen; Bich-Yen ; et al.	2016-03-24
Method For Fabricating Semiconductor Structures Including Transistor Channels Having Different Strain States, And Related Semiconductor Structures App 20160086974 - Sadaka; Mariam ; et al.	2016-03-24
Method For Fabricating Semiconductor Structures Including Fin Structures With Different Strain States, And Related Semiconductor Structures App 20160087100 - Nguyen; Bich-Yen ; et al.	2016-03-24
Methods of forming three-dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates Grant 9,293,448 - Nguyen , et al. March 22, 2	2016-03-22
Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures Grant 9,219,150 - Nguyen , et al. December 22, 2	2015-12-22
Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers Grant 9,209,301 - Nguyen , et al. December 8, 2	2015-12-08
Wafer with intrinsic semiconductor layer Grant 9,177,961 - Daval , et al. November 3, 2	2015-11-03
Method for fabricating semiconductor structures including transistor channels having different strain states, and related semiconductor structures Grant 9,165,945 - Sadaka , et al. October 20, 2	2015-10-20
Method for manufacturing a semiconductor substrate Grant 9,035,474 - Mazure , et al. May 19, 2	2015-05-19
Method for forming a Ge on III/V-on-insulator structure Grant 9,018,678 - Daval , et al. April 28, 2	2015-04-28
Bonded semiconductor structures and method of forming same Grant 8,987,114 - Mazure , et al. March 24, 2	2015-03-24
Methods Of Forming Three-dimensionally Integrated Semiconductor Systems Including Photoactive Devices And Semiconductor-on-insulator Substrates App 20140369646 - Nguyen; Bich-Yen ; et al.	2014-12-18
Methods of forming three dimensionally integrated semiconductor systems including photoactive devices and semiconductor-on-insulator substrates Grant 8,842,945 - Nguyen , et al. September 23, 2	2014-09-23
Pseudo-inverter Circuit With Multiple Independent Gate Transistors App 20140225648 - Mazure; Carlos ; et al.	2014-08-14
Methods of forming bonded semiconductor structures including interconnect layers having one or more of electrical, optical, and fluidic interconnects therein, and bonded semiconductor structures formed using such methods Grant 8,728,863 - Nguyen , et al. May 20, 2	2014-05-20
Pseudo-inverter circuit on SeOI Grant 8,654,602 - Mazure , et al. February 18, 2	2014-02-18
Multi-layer structures and process for fabricating semiconductor devices Grant 8,652,887 - Nguyen , et al. February 18, 2	2014-02-18
Nano-sense amplifier Grant 8,625,374 - Mazure , et al. January 7, 2	2014-01-07
Methods of forming bonded semiconductor structures in 3D integration processes using recoverable substrates, and bonded semiconductor structures formed by such methods Grant 8,617,925 - Sadaka , et al. December 31, 2	2013-12-31
SRAM-type memory cell Grant 8,575,697 - Mazure , et al. November 5, 2	2013-11-05
Device comprising a field-effect transistor in a silicon-on-insulator Grant 8,455,938 - Nguyen , et al. June 4, 2	2013-06-04
Nano-sense Amplifier App 20130100749 - MAZURE; Carlos ; et al.	2013-04-25
Three Dimensionally Integrated Semiconductor Systems Including Photoactive Devices And Semiconductor-on-insulator Substrates, And Methods Of Forming Such Three Dimensionally Integrated Semiconductor Systems App 20130039615 - Nguyen; Bich-Yen ; et al.	2013-02-14
Methods Of Forming Bonded Semiconductor Structures In 3d Integration Processes Using Recoverable Substrates, And Bonded Semiconductor Structures Formed By Such Methods App 20130037960 - Sadaka; Mariam ; et al.	2013-02-14
Methods Of Forming Bonded Semiconductor Structures Including Interconnect Layers Having One Or More Of Electrical, Optical, And Fluidic Interconnects Therein, And Bonded Semiconductor Structures Formed Using Such Methods App 20130037959 - Nguyen; Bich-Yen ; et al.	2013-02-14
Nano-sense amplifier Grant 8,358,552 - Mazure , et al. January 22, 2	2013-01-22
Bonded Semiconductor Structures And Method Of Forming Same App 20130015442 - Mazure; Carlos ; et al.	2013-01-17
Power MOSFET with a gate structure of different material Grant 8,309,410 - Pham , et al. November 13, 2	2012-11-13
PSEUDO-INVERTER CIRCUIT ON SeOI App 20120250444 - Mazure; Carlos ; et al.	2012-10-04
Multi-layer Structures And Process For Fabricating Semiconductor Devices App 20120231606 - Nguyen; Bich-Yen ; et al.	2012-09-13
Method For Forming A Ge On Iii/v-on-insulator Structure App 20120228672 - Daval; Nicolas ; et al.	2012-09-13
Wafer With Intrinsic Semiconductor Layer App 20120228689 - Daval; Nicolas ; et al.	2012-09-13
Pseudo-inverter circuit on SeOI Grant 8,223,582 - Mazure , et al. July 17, 2	2012-07-17
Modified hybrid orientation technology Grant 8,125,032 - Adetutu , et al. February 28, 2	2012-02-28
Hybrid semiconductor substrate including semiconductor-on-insulator region and method of making the same Grant 8,058,158 - Bourdelle , et al. November 15, 2	2011-11-15
Device Comprising A Field-effect Transistor In A Silicon-on-insulator App 20110260233 - Nguyen; Bich-Yen ; et al.	2011-10-27
Selective uniaxial stress modification for use with strained silicon on insulator integrated circuit Grant 8,039,341 - Thean , et al. October 18, 2	2011-10-18
Low-cost double-structure substrates and methods for their manufacture Grant 8,035,163 - Nguyen , et al. October 11, 2	2011-10-11
PSEUDO-INVERTER CIRCUIT ON SeO1 App 20110242926 - Mazure; Carlos ; et al.	2011-10-06
Method For Manufacturing A Semiconductor Substrate App 20110241157 - Mazure; Carlos ; et al.	2011-10-06
Sram-type Memory Cell App 20110233675 - Mazure; Carlos ; et al.	2011-09-29
Nano-sense Amplifier App 20110222361 - Mazure; Carlos ; et al.	2011-09-15
Low cost substrates and method of forming such substrates Grant 8,013,417 - Nguyen , et al. September 6, 2	2011-09-06
Power Mosfet With A Gate Structure Of Different Material App 20110195556 - PHAM; Daniel ; et al.	2011-08-11
Low-cost substrates having high-resistivity properties and methods for their manufacture Grant 7,977,705 - Nguyen , et al. July 12, 2	2011-07-12
Power MOSFET with a gate structure of different material Grant 7,943,988 - Pham , et al. May 17, 2	2011-05-17
Methods Of Manufacturing Semiconductor Structures And Semiconductor Structures Obtained By Such Methods App 20110042780 - Nguyen; Bich-Yen ; et al.	2011-02-24
Substrate Comprising Different Types Of Surfaces And Method For Obtaining Such Substrates App 20110037150 - Nguyen; Bich-Yen	2011-02-17
Electronic device including semiconductor fins and a process for forming the electronic device Grant 7,838,345 - Shi , et al. November 23, 2	2010-11-23
Fabrication Process Of A Hybrid Semiconductor Substrate App 20100289113 - Bourdelle; Konstantin ; et al.	2010-11-18
Electronic devices including a semiconductor layer Grant 7,821,067 - Thean , et al. October 26, 2	2010-10-26
Method for forming a semiconductor structure having a strained silicon layer Grant 7,811,382 - Sadaka , et al. October 12, 2	2010-10-12
Twisted dual-substrate orientation (DSO) substrates Grant 7,803,670 - White , et al. September 28, 2	2010-09-28
Electronic device including a semiconductor fin Grant 7,800,141 - Zhang , et al. September 21, 2	2010-09-21
Structure and method for strained transistor directly on insulator Grant 7,781,839 - Thean , et al. August 24, 2	2010-08-24
Semiconductor device structure Grant 7,781,840 - White , et al. August 24, 2	2010-08-24
Selective uniaxial stress relaxation by layout optimization in strained silicon on insulator integrated circuit Grant 7,781,277 - Nguyen , et al. August 24, 2	2010-08-24
Integrated circuit with different channel materials for P and N channel transistors and method therefor Grant 7,700,420 - Thean , et al. April 20, 2	2010-04-20
Power Mosfet With A Gate Structure Of Different Material App 20100059817 - PHAM; DANIEL ; et al.	2010-03-11
LDMOS with channel stress Grant 7,645,651 - Huang , et al. January 12, 2	2010-01-12
Low Cost Substrates And Method Of Forming Such Substrates App 20090321872 - Nguyen; Bich-Yen ; et al.	2009-12-31
Low-cost Double-structure Substrates And Methods For Their Manufacture App 20090321829 - Nguyen; Bich-Yen ; et al.	2009-12-31
Low-cost Substrates Having High-resistivity Properties And Methods For Their Manufacture App 20090321873 - Nguyen; Bich-Yen ; et al.	2009-12-31
Method for forming a semiconductor structure and structure thereof Grant 7,615,806 - Thean , et al. November 10, 2	2009-11-10
Asymmetric spacers and asymmetric source/drain extension layers Grant 7,585,735 - Mathew , et al. September 8, 2	2009-09-08
Modified Hybrid Orientation Technology App 20090218625 - Adetutu; Olubunmi O. ; et al.	2009-09-03
Inverse slope isolation and dual surface orientation integration Grant 7,575,968 - Sadaka , et al. August 18, 2	2009-08-18
Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer Grant 7,575,975 - Thean , et al. August 18, 2	2009-08-18
Process of forming an electronic device including a doped semiconductor layer Grant 7,560,354 - Zollner , et al. July 14, 2	2009-07-14
Ldmos With Channel Stress App 20090146180 - Huang; Xiaoqiu ; et al.	2009-06-11
Trench liner for DSO integration Grant 7,544,548 - Sadaka , et al. June 9, 2	2009-06-09
Semiconductor process integrating source/drain stressors and interlevel dielectric layer stressors Grant 7,538,002 - Zhang , et al. May 26, 2	2009-05-26
Modified hybrid orientation technology Grant 7,524,707 - Adetutu , et al. April 28, 2	2009-04-28
Process of forming an electronic device including a seed layer and a semiconductor layer selectively formed over the seed layer Grant 7,514,313 - Zia , et al. April 7, 2	2009-04-07
Semiconductor fabrication process using etch stop layer to optimize formation of source/drain stressor Grant 7,494,856 - Zhang , et al. February 24, 2	2009-02-24
Process Of Forming An Electronic Device Including A Doped Semiconductor Layer App 20090042373 - Zollner; Stefan ; et al.	2009-02-12
Electronic Device Including A Semiconductor Fin And A Process For Forming The Electronic Device App 20080296620 - Zhang; Da ; et al.	2008-12-04
Method of forming a CMOS device with stressor source/drain regions Grant 7,446,026 - Zhang , et al. November 4, 2	2008-11-04
Inverse slope isolation and dual surface orientation integration App 20080268587 - Sadaka; Mariam G. ; et al.	2008-10-30
Structure And Method For Strained Transistor Directly On Insulator App 20080237635 - Thean; Voon-Yew ; et al.	2008-10-02
Process of forming an electronic device including a semiconductor island over an insulating layer Grant 7,419,866 - Sadaka , et al. September 2, 2	2008-09-02
Electronic device including a static-random-access memory cell and a process of forming the electronic device Grant 7,414,877 - Burnett , et al. August 19, 2	2008-08-19
Process of forming an electronic device including a semiconductor fin Grant 7,413,970 - Zhang , et al. August 19, 2	2008-08-19
Method of making a multiple crystal orientation semiconductor device Grant 7,402,477 - Sadaka , et al. July 22, 2	2008-07-22
Selective Stress Relaxation By Amorphizing Implant In Strained Silicon On Insulator Integrated Circuit App 20080124858 - Nguyen; Bich-Yen ; et al.	2008-05-29
Semiconductor process with first transistor types oriented in a first plane and second transistor types oriented in a second plane Grant 7,354,814 - Orlowski , et al. April 8, 2	2008-04-08
Twisted Dual-Substrate Orientation (DSO) Substrates App 20080020515 - White; Ted R. ; et al.	2008-01-24
Selective Uniaxial Stress Modification For Use With Strained Silicon On Insulator Integrated Circuit App 20080014688 - Thean; Voon-Yew ; et al.	2008-01-17
Trench liner for DSO integration App 20070281436 - Sadaka; Mariam G. ; et al.	2007-12-06
Method For Forming A Semiconductor Structure Having A Strained Silicon Layer App 20070277728 - Sadaka; Mariam G. ; et al.	2007-12-06
Electronic Devices Including A Semiconductor Layer App 20070272952 - Thean; Voon-Yew ; et al.	2007-11-29
Selective Uniaxial Stress Relaxation By Layout Optimization In Strained Silicon On Insulator Integrated Circuit App 20070262385 - Nguyen; Bich-Yen ; et al.	2007-11-15
Electronic device including semiconductor fins and a process for forming the electronic device App 20070259485 - Shi; Zhonghai ; et al.	2007-11-08
Method to selectively form regions having differing properties and structure Grant 7,285,452 - Sadaka , et al. October 23, 2	2007-10-23
Integrated circuit with different channel materials for P and N channel transistors and method therefor App 20070241403 - Thean; Voon-Yew ; et al.	2007-10-18
Method of making a dual strained channel semiconductor device Grant 7,282,402 - Sadaka , et al. October 16, 2	2007-10-16
Method for making a semiconductor device with strain enhancement Grant 7,282,415 - Zhang , et al. October 16, 2	2007-10-16
Semiconductor fabrication process using etch stop layer to optimize formation of source/drain stressor App 20070238250 - Zhang; Da ; et al.	2007-10-11
Method of making a multiple crystal orientation semiconductor device App 20070238233 - Sadaka; Mariam G. ; et al.	2007-10-11
Electronic device and a process for forming the electronic device App 20070235813 - Zia; Omar ; et al.	2007-10-11
Semiconductor Device Structure And Method Therefor App 20070235807 - White; Ted R. ; et al.	2007-10-11
Electronic device including semiconductor islands of different thicknesses over an insulating layer and a process of forming the same App 20070218707 - Sadaka; Mariam G. ; et al.	2007-09-20
Electronic device including a semiconductor fin and a process for forming the electronic device App 20070215908 - Zhang; Da ; et al.	2007-09-20
Electronic devices including a semiconductor layer and a process for forming the same Grant 7,265,004 - Thean , et al. September 4, 2	2007-09-04
Semiconductor process integrating source/drain stressors and interlevel dielectric layer stressors App 20070202651 - Zhang; Da ; et al.	2007-08-30
Method to selectively form regions having differing properties and structure App 20070190745 - Sadaka; Mariam G. ; et al.	2007-08-16
Stressed-channel CMOS transistors App 20070184600 - Zhang; Da ; et al.	2007-08-09
Method of forming a semiconductor device App 20070184601 - Zhang; Da ; et al.	2007-08-09
Electronic device including a static-random-access memory cell and a process of forming the electronic device App 20070171700 - Burnett; James D. ; et al.	2007-07-26
Graded semiconductor layer Grant 7,241,647 - Sadaka , et al. July 10, 2	2007-07-10
Method for forming uniaxially strained devices Grant 7,238,561 - Zhang , et al. July 3, 2	2007-07-03
Semiconductor transistor having structural elements of differing materials Grant 7,230,264 - Thean , et al. June 12, 2	2007-06-12
Transistor fabrication using double etch/refill process Grant 7,226,820 - Zhang , et al. June 5, 2	2007-06-05
Semiconductor device structure and method therefor Grant 7,226,833 - White , et al. June 5, 2	2007-06-05
Electronic devices including a semiconductor layer and a process for forming the same App 20070108481 - Thean; Voon-Yew ; et al.	2007-05-17
Method for forming a semiconductor structure and structure thereof App 20070099353 - Thean; Voon-Yew ; et al.	2007-05-03
Method for forming a semiconductor structure and structure thereof App 20070099361 - Thean; Voon-Yew ; et al.	2007-05-03
Method of forming a semiconductor device having a metal layer Grant 7,208,424 - Stephens , et al. April 24, 2	2007-04-24
Template layer formation Grant 7,208,357 - Sadaka , et al. April 24, 2	2007-04-24
Semiconductor structure having strained semiconductor and method therefor Grant 7,205,210 - Barr , et al. April 17, 2	2007-04-17
Modified hybrid orientation technology App 20070048919 - Adetutu; Olubunmi O. ; et al.	2007-03-01
Method for forming uniaxially strained devices App 20070032003 - Zhang; Da ; et al.	2007-02-08
Channel orientation to enhance transistor performance Grant 7,160,769 - White , et al. January 9, 2	2007-01-09
Semiconductor structures and methods of fabricating semiconductor structures comprising hafnium oxide modified with lanthanum, a lanthanide-series metal, or a combination thereof Grant 7,141,857 - Yu , et al. November 28, 2	2006-11-28
Method for making a semiconductor device with strain enhancement App 20060228863 - Zhang; Da ; et al.	2006-10-12
Method of making a dual strained channel semiconductor device App 20060228851 - Sadaka; Mariam G. ; et al.	2006-10-12
Method of making a semiconductor device having an arched structure strained semiconductor layer App 20060228872 - Nguyen; Bich-Yen ; et al.	2006-10-12
Transistor fabrication using double etch/refill process App 20060228842 - Zhang; Da ; et al.	2006-10-12
Semiconductor device featuring an arched structure strained semiconductor layer App 20060226492 - Nguyen; Bich-Yen ; et al.	2006-10-12
Semiconductor fabrication process including recessed source/drain regions in an SOI wafer Grant 7,091,071 - Thean , et al. August 15, 2	2006-08-15
Asymmetric spacers and asymmetric source/drain extension layers App 20060170016 - Mathew; Leo ; et al.	2006-08-03
Semiconductor Fabrication Process Including Recessed Source/drain Regions In An Soi Wafer App 20060148196 - Thean; Voon-Yew ; et al.	2006-07-06
Double gate device having a heterojunction source/drain and strained channel Grant 7,067,868 - Thean , et al. June 27, 2	2006-06-27
Semiconductor layer formation Grant 7,056,778 - Liu , et al. June 6, 2	2006-06-06
Semiconductor fabrication process including source/drain recessing and filling App 20060115949 - Zhang; Da ; et al.	2006-06-01
Semiconductor device structure and method therefor App 20060094169 - White; Ted R. ; et al.	2006-05-04
Low RC product transistors in SOI semiconductor process Grant 7,037,795 - Barr , et al. May 2, 2	2006-05-02
Low Rc Product Transistors In Soi Semiconductor Process App 20060084235 - Barr; Alexander L. ; et al.	2006-04-20
Channel orientation to enhance transistor performance App 20060084207 - White; Ted R. ; et al.	2006-04-20
Method of manufacturing SOI template layer Grant 7,029,980 - Liu , et al. April 18, 2	2006-04-18
Semiconductor transistor having structural elements of differing materials App 20060076579 - Thean; Voon-Yew ; et al.	2006-04-13
Method For Forming A Semiconductor Device Having A Strained Channel And A Heterojunction Source/drain App 20060068553 - Thean; Voon-Yew ; et al.	2006-03-30
Double gate device having a heterojunction source/drain and strained channel App 20060065927 - Thean; Voon-Yew ; et al.	2006-03-30
Method for forming a semiconductor device having a strained channel and a heterojunction source/drain Grant 7,018,901 - Thean , et al. March 28, 2	2006-03-28
Semiconductor process with first transistor types oriented in a first plane and second transistor types oriented in a second plane App 20060063320 - Orlowski; Marius K. ; et al.	2006-03-23
Method of forming a semiconductor device having a metal layer App 20060063364 - Stephens; Tab A. ; et al.	2006-03-23
Graded semiconductor layer App 20060040433 - Sadaka; Mariam G. ; et al.	2006-02-23
Strained semiconductor devices and method for forming at least a portion thereof App 20060030093 - Zhang; Da ; et al.	2006-02-09
Semiconductor transistor having structural elements of differing materials and method of formation Grant 6,979,622 - Thean , et al. December 27, 2	2005-12-27
Confined spacers for double gate transistor semiconductor fabrication process Grant 6,951,783 - Mathew , et al. October 4, 2	2005-10-04
Method for forming a semiconductor device structure a semiconductor layer Grant 6,949,455 - Pham , et al. September 27, 2	2005-09-27
Semiconductor structure having strained semiconductor and method therefor App 20050181549 - Barr, Alexander L. ; et al.	2005-08-18
Confined Spacers For Double Gate Transistor Semiconductor Fabrication Process App 20050101069 - Mathew, Leo ; et al.	2005-05-12
Inverted isolation formed with spacers Grant 6,891,229 - Franke , et al. May 10, 2	2005-05-10
Template layer formation App 20050070053 - Sadaka, Mariam G. ; et al.	2005-03-31
Semiconductor layer formation App 20050070057 - Liu, Chun-Li ; et al.	2005-03-31
SOI template layer App 20050070056 - Liu, Chun-Li ; et al.	2005-03-31
Method for forming a double-gated semiconductor device Grant 6,838,322 - Pham , et al. January 4, 2	2005-01-04
Method of making an integrated circuit using an EUV mask formed by atomic layer deposition Grant 6,835,671 - Hector , et al. December 28, 2	2004-12-28
Semiconductor structure with different lattice constant materials and method for forming the same Grant 6,831,350 - Liu , et al. December 14, 2	2004-12-14
Method For Forming A Double-gated Semiconductor Device App 20040219722 - Pham, Daniel T. ; et al.	2004-11-04
Inverted isolation formed with spacers App 20040217437 - Franke, Andrea ; et al.	2004-11-04
Dual metal gate transistors for CMOS process Grant 6,794,281 - Madhukar , et al. September 21, 2	2004-09-21
High K dielectric film Grant 6,770,923 - Nguyen , et al. August 3, 2	2004-08-03
Multiple gate transistor employing monocrystalline silicon walls Grant 6,753,216 - Mathew , et al. June 22, 2	2004-06-22
Process for forming a metal oxy-nitride dielectric layer by varying the flow rate of nitrogen into the chamber Grant 6,743,668 - Schaeffer, III , et al. June 1, 2	2004-06-01
Multiple Gate Transistor Employing Monocrystalline Silicon Walls App 20040084674 - Mathew, Leo ; et al.	2004-05-06
Method for forming a semiconductor device structure a semiconductor layer App 20040063285 - Pham, Daniel Thanh-Khac ; et al.	2004-04-01
Method of making an integrated circuit using an EUV mask formed by atomic layer deposition App 20040033699 - Hector, Scott Daniel ; et al.	2004-02-19
Method For Forming A Semiconductor Device Structure In A Semiconductoe Layer App 20040018681 - Pham, Daniel Thanh-Khac ; et al.	2004-01-29
Dual metal gate transistors for CMOS process App 20030216038 - Madhukar, Sucharita ; et al.	2003-11-20
Semiconductor structure and process for forming a metal oxy-nitride dielectric layer App 20030205772 - Schaeffer, James K. III ; et al.	2003-11-06
Method of forming a vertical double gate semiconductor device and structure thereof App 20030151077 - Mathew, Leo ; et al.	2003-08-14
Semiconductor structure and process for forming a metal oxy-nitride dielectric layer Grant 6,576,967 - Schaeffer, III , et al. June 10, 2	2003-06-10
Dual metal gate transistors for CMOS process Grant 6,545,324 - Madhukar , et al. April 8, 2	2003-04-08
Amorphous metal oxide gate dielectric structure and method thereof App 20030054669 - Alluri, Prasad V. ; et al.	2003-03-20
Strontium nitride or strontium oxynitride gate dielectric Grant 6,518,634 - Kaushik , et al. February 11, 2	2003-02-11
Semiconductor device and a method therefor Grant 6,518,106 - Ngai , et al. February 11, 2	2003-02-11
Semiconductor device and method therefor App 20030015758 - Taylor, JR, William J. ; et al.	2003-01-23
Grooved channel schottky MOSFET Grant 6,509,609 - Zhang , et al. January 21, 2	2003-01-21
Grooved channel schottky mosfet App 20030011009 - Zhang, Yaohui ; et al.	2003-01-16
Semiconductor device and a method therefor App 20020175384 - Ngai, Tat ; et al.	2002-11-28
High K dielectric film and method for making App 20020137317 - Kaushik, Vidya S. ; et al.	2002-09-26
High K dielectric film and method for making App 20020137250 - Nguyen, Bich-Yen ; et al.	2002-09-26
Dual metal gate transistors for CMOS process App 20020135023 - Madhukar, Sucharita ; et al.	2002-09-26
Dual metal gate transistors for CMOS process Grant 6,444,512 - Madhukar , et al. September 3, 2	2002-09-03
Memory device and method for using prefabricated isolated storage elements Grant 6,413,819 - Zafar , et al. July 2, 2	2002-07-02
Method for forming a semiconductor device with an opening in a dielectric layer Grant 6,362,071 - Nguyen , et al. March 26, 2	2002-03-26
Memory device that includes passivated nanoclusters and method for manufacture Grant 6,297,095 - Muralidhar , et al. October 2, 2	2001-10-02
Method To Locate Particles Of A Predetermined Species Within A Solid And Resulting Structures App 20010003381 - ORLOWSKI, MARIUS ; et al.	2001-06-14
Process for forming a high-K gate dielectric Grant 6,184,072 - Kaushik , et al. February 6, 2	2001-02-06
Semiconductor device having a metal containing layer overlying a gate dielectric Grant 6,084,279 - Nguyen , et al. July 4, 2	2000-07-04
Method of making a power switching trench MOSFET having aligned source regions Grant 5,897,343 - Mathew , et al. April 27, 1	1999-04-27
Method for forming an integrated circuit pattern on a semiconductor substrate using silicon-rich silicon nitride Grant 5,639,687 - Roman , et al. June 17, 1	1997-06-17
High-performance thin-film transistor and SRAM memory cell Grant 5,567,958 - Orlowski , et al. October 22, 1	1996-10-22
Monolithic semiconductor body with convex structure Grant 5,539,216 - Nguyen , et al. July 23, 1	1996-07-23
Method and structure for forming an integrated circuit pattern on a semiconductor substrate Grant 5,539,249 - Roman , et al. July 23, 1	1996-07-23
Method for forming a thin film transistor Grant 5,510,278 - Nguyen , et al. April 23, 1	1996-04-23
Method for forming electrical isolation in an integrated circuit Grant 5,422,300 - Pfiester , et al. * June 6, 1	1995-06-06
Interconnection structure for conductive layers Grant 5,408,130 - Woo , et al. April 18, 1	1995-04-18
Method and structure for forming an integrated circuit pattern on a semiconductor substrate Grant 5,378,659 - Roman , et al. January 3, 1	1995-01-03
Method of removing contaminants Grant 5,300,187 - Lesk , et al. April 5, 1	1994-04-05
Method for forming an interconnection structure for conductive layers Grant 5,262,352 - Woo , et al. November 16, 1	1993-11-16
Method for forming pitch independent contacts and a semiconductor device having the same Grant 5,219,793 - Cooper , et al. June 15, 1	1993-06-15
Self-aligned under-gated thin film transistor and method of formation Grant 5,158,898 - Hayden , et al. October 27, 1	1992-10-27
Process for forming high purity thin films Grant 4,987,102 - Nguyen , et al. January 22, 1	1991-01-22
Encapsulation method for localized oxidation of silicon Grant 4,927,780 - Roth , et al. May 22, 1	1990-05-22
Method for locos isolation using a framed oxidation mask and a polysilicon buffer layer Grant 4,897,364 - Nguyen , et al. January 30, 1	1990-01-30
Integrated circuit trench cell Grant 4,890,144 - Teng , et al. December 26, 1	1989-12-26
Trench formation process Grant 4,693,781 - Leung , et al. September 15, 1	1987-09-15
Integrated circuit trench cell Grant 4,686,552 - Teng , et al. August 11, 1	1987-08-11