loadpatents
Patent applications and USPTO patent grants for Ngo; Hung C..The latest application filed is for "bit cell write-assistance".
Patent | Date |
---|---|
Bit cell write-assistance Grant 9,269,409 - Bajkowski , et al. February 23, 2 | 2016-02-23 |
Automated critical area allocation in a physical synthesized hierarchical design Grant 8,656,332 - Fleischer , et al. February 18, 2 | 2014-02-18 |
Bit Cell Write-assistance App 20130268737 - Bajkowski; Maciej ;   et al. | 2013-10-10 |
Test structure for characterizing multi-port static random access memory and register file arrays Grant 8,555,119 - Chang , et al. October 8, 2 | 2013-10-08 |
Structure for high density stable static random access memory Grant 8,405,129 - Chuang , et al. March 26, 2 | 2013-03-26 |
System and method for implementing simplified arithmetic logic unit processing of value-based control dependence sequences Grant 8,285,765 - Chen , et al. October 9, 2 | 2012-10-09 |
Test structure for characterizing multi-port static random access memory and register file arrays Grant 8,261,138 - Chang , et al. September 4, 2 | 2012-09-04 |
Test Structure For Characterizing Multi-port Static Random Access Memory And Register File Arrays App 20120212997 - Chang; Leland ;   et al. | 2012-08-23 |
Design Structure for High Density Stable Static Random Access Memory App 20120205721 - Chuang; Ching-Te K. ;   et al. | 2012-08-16 |
High density stable static random access memory Grant 8,217,427 - Chuang , et al. July 10, 2 | 2012-07-10 |
Method and system for a wiring-efficient permute unit Grant 8,069,195 - Fleischer , et al. November 29, 2 | 2011-11-29 |
Circuit timing monitor having a selectable-path ring oscillator Grant 7,810,000 - Ngo , et al. October 5, 2 | 2010-10-05 |
Automated Critical Area Allocation in a Physical Synthesized Hierarchical Design App 20100218155 - Fleischer; Bruce M. ;   et al. | 2010-08-26 |
Cascaded pass-gate test circuit with interposed split-output drive devices Grant 7,782,092 - Chuang , et al. August 24, 2 | 2010-08-24 |
Wordline-to-bitline output timing ring oscillator circuit for evaluating storage array performance Grant 7,760,565 - Kuang , et al. July 20, 2 | 2010-07-20 |
Programmable local clock buffer Grant 7,719,315 - Ngo , et al. May 18, 2 | 2010-05-18 |
Digital duty cycle corrector Grant 7,667,513 - Carpenter , et al. February 23, 2 | 2010-02-23 |
High Density Stable Static Random Access Memory App 20090302354 - Chuang; Ching-Te K. ;   et al. | 2009-12-10 |
High performance, low power, dynamically latched up/down counter Grant 7,587,020 - Law , et al. September 8, 2 | 2009-09-08 |
Method and System for a Wiring-Efficient Permute Unit App 20090177870 - Fleischer; Bruce M. ;   et al. | 2009-07-09 |
Digital frequency multiplier circuit Grant 7,525,393 - Ngo , et al. April 28, 2 | 2009-04-28 |
Dynamic power and clock-gating method and circuitry with sleep mode based on estimated time for receipt of next wake-up signal Grant 7,487,374 - Liu , et al. February 3, 2 | 2009-02-03 |
Wordline-To-Bitline Output Timing Ring Oscillator Circuit for Evaluating Storage Array Performance App 20090027065 - Kuang; Jente B. ;   et al. | 2009-01-29 |
Pulsed local clock buffer (LCB) characterization ring oscillator Grant 7,459,950 - Ngo , et al. December 2, 2 | 2008-12-02 |
Self-Resetting Phase Frequency Detector with Multiple Ranges of Clock Difference App 20080265957 - Luong; Trong V. ;   et al. | 2008-10-30 |
High Performance, Low Power, Dynamically Latched Up/Down Counter App 20080267341 - Law; Jethro C. ;   et al. | 2008-10-30 |
Digital Frequency Multiplier Circuit App 20080266000 - Ngo; Hung C. ;   et al. | 2008-10-30 |
Cascaded Pass-gate Test Circuit With Interposed Split-output Drive Devices App 20080201672 - Chuang; Ching-Te ;   et al. | 2008-08-21 |
Test Structure for Characterizing Multi-Port Static Random Access Memory and Register File Arrays App 20080155362 - Chang; Leland ;   et al. | 2008-06-26 |
System and Method for Implementing Simplified Arithmetic Logic Unit Processing of Value-Based Control Dependence Sequences App 20080141006 - Chen; Lei ;   et al. | 2008-06-12 |
Partial Data Flow Functional Gating Using Structural Or Partial Operand Value Information App 20080141046 - Chen; Lei ;   et al. | 2008-06-12 |
Hybrid Keeper Circuit for Dynamic Logic App 20080116938 - Ngo; Hung C. ;   et al. | 2008-05-22 |
Circuit Timing Monitor Having A Selectable-Path Ring Oscillator App 20080115019 - Ngo; Hung C. ;   et al. | 2008-05-15 |
Scannable dynamic logic latch circuit Grant 7,372,305 - Ngo , et al. May 13, 2 | 2008-05-13 |
Programmable Local Clock Buffer App 20080101522 - Ngo; Hung C. ;   et al. | 2008-05-01 |
Scannable Dynamic Logic Latch Circuit App 20080100344 - Ngo; Hung C. ;   et al. | 2008-05-01 |
Pulsed Local Clock Buffer (lcb) Characterization Ring Oscillator App 20080100360 - Ngo; Hung C. ;   et al. | 2008-05-01 |
Cascaded pass-gate test circuit with interposed split-output drive devices Grant 7,323,908 - Chuang , et al. January 29, 2 | 2008-01-29 |
Dual-gate dynamic logic circuit with pre-charge keeper Grant 7,298,176 - Ngo , et al. November 20, 2 | 2007-11-20 |
Method and apparatus for fail-safe and restartable system clock generation Grant 7,288,975 - Ngo , et al. October 30, 2 | 2007-10-30 |
4-to-2 carry save adder using limited switching dynamic logic Grant 7,284,029 - Belluomini , et al. October 16, 2 | 2007-10-16 |
Power-gating cell for virtual power rail control Grant 7,276,932 - Kuang , et al. October 2, 2 | 2007-10-02 |
Dynamic leakage control circuit Grant 7,266,707 - Ngo , et al. September 4, 2 | 2007-09-04 |
Control circuitry for power gating virtual power supply rails at differing voltage potentials Grant 7,219,244 - Kuang , et al. May 15, 2 | 2007-05-15 |
Computing carry-in bit to most significant bit carry save adder in current stage Grant 7,216,141 - Belluomini , et al. May 8, 2 | 2007-05-08 |
Method and apparatus for fail-safe and restartable system clock generation App 20070096782 - Ngo; Hung C. ;   et al. | 2007-05-03 |
Cascaded pass-gate test circuit with interposed split-output drive devices App 20070096770 - Chuang; Ching-Te ;   et al. | 2007-05-03 |
Control circuitry for power gating virtual power supply rails at differing voltage potentials App 20070046323 - Kuang; Jente Benedict ;   et al. | 2007-03-01 |
Voltage controlled oscillator using dual gated asymmetrical FET devices App 20070040621 - Ngo; Hung C. ;   et al. | 2007-02-22 |
Dual-gate dynamic logic circuit with pre-charge keeper App 20070040584 - Ngo; Hung C. ;   et al. | 2007-02-22 |
Controlled load limited switch dynamic logic circuitry Grant 7,129,754 - Ngo , et al. October 31, 2 | 2006-10-31 |
Controlled Load Limited Switch Dynamic Logic Circuitry App 20060208763 - Ngo; Hung C. ;   et al. | 2006-09-21 |
Dynamic power and clock-gating method and circuitry App 20060156043 - Liu; Ying ;   et al. | 2006-07-13 |
Circuit for controlling leakage Grant 7,061,265 - Ngo , et al. June 13, 2 | 2006-06-13 |
Low power high frequency phase detector Grant 7,057,432 - Yoo , et al. June 6, 2 | 2006-06-06 |
Digital duty cycle corrector App 20060103441 - Carpenter; Gary D. ;   et al. | 2006-05-18 |
Interface circuit for coupling between logic circuit domains Grant 7,046,063 - Kuang , et al. May 16, 2 | 2006-05-16 |
Low Power High Frequency Phase Detector App 20060076991 - Yoo; Seung-Moon ;   et al. | 2006-04-13 |
Power-gating cell for virtual power rail control App 20060055391 - Kuang; Jente B. ;   et al. | 2006-03-16 |
Dynamic leakage control circuit App 20060059376 - Ngo; Hung C. ;   et al. | 2006-03-16 |
Interleaved VCO with body voltage frequency range control Grant 7,002,420 - Ngo February 21, 2 | 2006-02-21 |
Circuit for controlling leakage App 20060033531 - Ngo; Hung C. ;   et al. | 2006-02-16 |
Self limiting gate leakage driver Grant 6,980,018 - Ngo , et al. December 27, 2 | 2005-12-27 |
Buffer/driver circuits Grant 6,975,134 - Kuang , et al. December 13, 2 | 2005-12-13 |
Adaptive phase locked loop Grant 6,963,629 - Boerstler , et al. November 8, 2 | 2005-11-08 |
Voltage controlled oscillator with selectable frequency ranges Grant 6,963,250 - Ngo , et al. November 8, 2 | 2005-11-08 |
Self Limiting Gate Leakage Driver App 20050242840 - Ngo, Hung C. ;   et al. | 2005-11-03 |
Limited switch dynamic logic circuit with keeper Grant 6,960,939 - Ngo November 1, 2 | 2005-11-01 |
Phase clock selector for generating a non-integer frequency division Grant 6,956,793 - Ngo October 18, 2 | 2005-10-18 |
Buffer/driver Circuits App 20050225352 - Kuang, Jente B. ;   et al. | 2005-10-13 |
Interface circuit for coupling between logic circuit domains App 20050225355 - Kuang, Jente B. ;   et al. | 2005-10-13 |
Low switching power limited switch dynamic logic Grant 6,940,312 - Ngo , et al. September 6, 2 | 2005-09-06 |
Interleaved VCO with body voltage frequency range control App 20050168295 - Ngo, Hung C. | 2005-08-04 |
Feedforward limited switch dynamic logic circuit Grant 6,919,739 - Ngo July 19, 2 | 2005-07-19 |
Low Switching Power Limited Switch Dynamic Logic App 20050127949 - Ngo, Hung C. ;   et al. | 2005-06-16 |
Feedforward Limited Switch Dynamic Logic Circuit App 20050127950 - Ngo, Hung C. | 2005-06-16 |
Phase Clock Selector For Generating A Non-integer Frequency Division App 20050110581 - Ngo, Hung C. | 2005-05-26 |
Voltage controlled oscillator with selectable frequency ranges App 20050110578 - Ngo, Hung C. ;   et al. | 2005-05-26 |
Computing carry-in bit to most significant bit carry save adder in current stage App 20050102346 - Belluomini, Wendy A. ;   et al. | 2005-05-12 |
4-to-2 carry save adder using limited switching dynamic logic App 20050102345 - Belluomini, Wendy A. ;   et al. | 2005-05-12 |
Duo-mode keeper circuit Grant 6,888,377 - Ngo May 3, 2 | 2005-05-03 |
Low gate-leakage virtual rail circuit Grant 6,872,991 - Ngo , et al. March 29, 2 | 2005-03-29 |
Limited switch dynamic logic selector circuits Grant 6,873,188 - Belluomini , et al. March 29, 2 | 2005-03-29 |
Limited switch dynamic logic circuit with keeper App 20050052202 - Ngo, Hung C. | 2005-03-10 |
Multi-mode VCO Grant 6,809,602 - Boerstler , et al. October 26, 2 | 2004-10-26 |
Limited switch dynamic logic selector circuits App 20040051560 - Belluomini, Wendy A. ;   et al. | 2004-03-18 |
Limited switch dynamic logic circuit Grant 6,690,204 - Belluomini , et al. February 10, 2 | 2004-02-10 |
Method and apparatus for performing rotate operations using cascaded multiplexers Grant 6,675,182 - Hofstee , et al. January 6, 2 | 2004-01-06 |
Multi-mode VCO App 20030071691 - Boerstler, David W. ;   et al. | 2003-04-17 |
Dual mode charge pump Grant 6,529,082 - Boerstler , et al. March 4, 2 | 2003-03-04 |
Adaptive phase locked loop App 20030026372 - Boerstler, David W. ;   et al. | 2003-02-06 |
Dynamically scalable low voltage clock generation system Grant 6,515,530 - Boerstler , et al. February 4, 2 | 2003-02-04 |
Glitch-less clock selector Grant 6,501,304 - Boerstler , et al. December 31, 2 | 2002-12-31 |
Clock divider with bypass and stop clock Grant 6,483,888 - Boerstler , et al. November 19, 2 | 2002-11-19 |
Single register arbiter circuit Grant 5,375,223 - Meyers , et al. December 20, 1 | 1994-12-20 |
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