loadpatents
name:-0.0033369064331055
name:-0.017580032348633
name:-0.0014829635620117
Ng; Che-Hoo Patent Filings

Ng; Che-Hoo

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ng; Che-Hoo.The latest application filed is for "xe preamorphizing implantation".

Company Profile
0.17.2
  • Ng; Che-Hoo - San Martin CA
  • Ng; Che-Hoo - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for suppressing the channeling effect in high energy deep well implantation
Grant 6,806,147 - Yu , et al. October 19, 2
2004-10-19
Ion implantation with improved ion source life expectancy
Grant 6,756,600 - Ng , et al. June 29, 2
2004-06-29
Method for ultra thin resist linewidth reduction using implantation
Grant 6,642,152 - Ng , et al. November 4, 2
2003-11-04
XE preamorphizing implantation
Grant 6,624,037 - Buynoski , et al. September 23, 2
2003-09-23
XE preamorphizing implantation
App 20030027381 - Buynoski, Matthew Stephen ;   et al.
2003-02-06
Method of inhibiting lateral diffusion between adjacent wells by introducing carbon or fluorine ions into bottom of STI groove
Grant 6,514,833 - Ishida , et al. February 4, 2
2003-02-04
Non-uniform channel profile via enhanced diffusion
Grant 6,503,801 - Rouse , et al. January 7, 2
2003-01-07
Minimized contamination of semiconductor wafers within an implantation system
Grant 6,452,198 - Mani , et al. September 17, 2
2002-09-17
Flash memory erase speed by fluorine implant or fluorination
Grant 6,445,030 - Wu , et al. September 3, 2
2002-09-03
Semiconductor with laterally non-uniform channel doping profile and manufacturing method therefor
Grant 6,380,041 - Yeap , et al. April 30, 2
2002-04-30
Ion Implantation With Improved Ion Source Life Expectancy
App 20020000523 - NG, CHE-HOO ;   et al.
2002-01-03
Method for preparing narrow photoresist lines
Grant 6,232,048 - Buynoski , et al. May 15, 2
2001-05-15
Method for forming a shallow junction in a semiconductor device using antimony dimer
Grant 6,191,012 - Ng , et al. February 20, 2
2001-02-20
Mosfet with gate plug using differential oxide growth
Grant 6,136,674 - An , et al. October 24, 2
2000-10-24
End-of-range damage suppression for ultra-shallow junction formation
Grant 6,074,937 - Pramanick , et al. June 13, 2
2000-06-13
Ultra shallow junction formation using amorphous silicon layer
Grant 6,008,098 - Pramanick , et al. December 28, 1
1999-12-28
Reduction of charge loss in nonvolatile memory cells by phosphorus implantation into PECVD nitride/oxynitride films
Grant 5,940,735 - Mehta , et al. August 17, 1
1999-08-17
Virtual hard mask for etching
Grant 5,876,903 - Ng , et al. March 2, 1
1999-03-02
Conductive layer with anti-reflective surface portion
Grant 5,841,179 - Pramanick , et al. November 24, 1
1998-11-24

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