| Patent | Date |
|---|
Host-directed multi-layer neural network processing via per-layer work requests
Grant 11,429,848 - Ng , et al. August 30, 2 | 2022-08-30 |
Image preprocessing for generalized image processing
Grant 11,386,644 - Delaye , et al. July 12, 2 | 2022-07-12 |
Neural network processing system having multiple processors and a neural network accelerator
Grant 11,222,256 - Teng , et al. January 11, 2 | 2022-01-11 |
Re-targetable interface for data exchange between heterogeneous systems and accelerator abstraction into software instructions
Grant 11,204,747 - Zejda , et al. December 21, 2 | 2021-12-21 |
Software-defined buffer/transposer for general matrix multiplication in a programmable IC
Grant 11,036,827 - Zejda , et al. June 15, 2 | 2021-06-15 |
Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit
Grant 10,984,500 - Sirasao , et al. April 20, 2 | 2021-04-20 |
Software-driven design optimization for fixed-point multiply-accumulate circuitry
Grant 10,943,039 - Sirasao , et al. March 9, 2 | 2021-03-09 |
Sparse matrix processing circuitry
Grant 10,936,311 - Liu , et al. March 2, 2 | 2021-03-02 |
Software-driven design optimization for mapping between floating-point and fixed-point multiply accumulators
Grant 10,678,509 - Settle , et al. | 2020-06-09 |
Data format suitable for fast massively parallel general matrix multiplication in a programmable IC
Grant 10,515,135 - Zejda , et al. Dec | 2019-12-24 |
Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit
Grant 10,460,416 - Sirasao , et al. Oc | 2019-10-29 |
Timing closure of circuit designs for integrated circuits
Grant 10,366,201 - Ng , et al. July 30, 2 | 2019-07-30 |
Software-defined memory bandwidth reduction by hierarchical stream buffering for general matrix multiplication in a programmable IC
Grant 10,354,733 - Zejda , et al. July 16, 2 | 2019-07-16 |
Machine Learning Runtime Library For Neural Network Acceleration
App 20190114533 - Ng; Aaron ; et al. | 2019-04-18 |
Host-directed Multi-layer Neural Network Processing Via Per-layer Work Requests
App 20190114538 - Ng; Aaron ; et al. | 2019-04-18 |
Neural Network Processing System Having Host Controlled Kernel Acclerators
App 20190114535 - Ng; Aaron ; et al. | 2019-04-18 |
Neural Network Processing System Having Multiple Processors And A Neural Network Accelerator
App 20190114534 - Teng; Xiao ; et al. | 2019-04-18 |
Multi-layer Neural Network Processing By A Neural Network Accelerator Using Host Communicated Merged Weights And A Package Of Per-layer Instructions
App 20190114529 - Ng; Aaron ; et al. | 2019-04-18 |
Image Preprocessing For Generalized Image Processing
App 20190114499 - Delaye; Elliott ; et al. | 2019-04-18 |
Neural network based physical synthesis for circuit designs
Grant 10,192,016 - Ng , et al. Ja | 2019-01-29 |
Neural Network Based Physical Synthesis For Circuit Designs
App 20180203956 - Ng; Aaron ; et al. | 2018-07-19 |
Fanout optimization to facilitate timing improvement in circuit designs
Grant 9,965,581 - Das , et al. May 8, 2 | 2018-05-08 |
Programmable integrated circuit design flow using timing-driven pipeline analysis
Grant 9,836,568 - Ganusov , et al. December 5, 2 | 2017-12-05 |
Post-routing structural netlist optimization for circuit designs
Grant 9,646,126 - Lu , et al. May 9, 2 | 2017-05-09 |
Resource mapping of functional areas on an integrated circuit
Grant 7,840,919 - Wang , et al. November 23, 2 | 2010-11-23 |
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