NEYER; Thomas

Patent Applications and Registrations

Patent applications and USPTO patent grants for NEYER; Thomas.The latest application filed is for "vertical transistors with gate connection grid".

Company Profile

6.9.14

NEYER; Thomas - Munich DE
Neyer; Thomas - Villach AT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Vertical Transistors With Gate Connection Grid App 20220285248 - NEYER; Thomas ; et al.	2022-09-08
Power device including metal layer Grant 11,398,437 - Lee , et al. July 26, 2	2022-07-26
Mosfet Device With Undulating Channel App 20220223691 - CHO; Kevin Kyuheon ; et al.	2022-07-14
Semiconductor substrate singulation systems and related methods Grant 11,373,859 - Seddon , et al. June 28, 2	2022-06-28
Termination Structures With Reduced Dynamic Output Capacitance Loss App 20220199764 - ROIG-GUITART; Jaume ; et al.	2022-06-23
Semiconductor wafer thinning systems and related methods Grant 11,152,211 - Seddon , et al. October 19, 2	2021-10-19
Power Device Including Metal Layer App 20210183788 - LEE; Bongyong ; et al.	2021-06-17
Power Device With Graded Channel App 20210134997 - CHO; Kevin Kyuheon ; et al.	2021-05-06
Semiconductor Substrate Singulation Systems And Related Methods App 20210118666 - SEDDON; Michael J. ; et al.	2021-04-22
Systems And Methods For Designing A Discrete Device Product App 20210117598 - VICTORY; James Joseph ; et al.	2021-04-22
Diode with current sensor Grant 10,950,596 - Zeng , et al. March 16, 2	2021-03-16
Semiconductor substrate singulation systems and related methods Grant 10,896,815 - Seddon , et al. January 19, 2	2021-01-19
Semiconductor Wafer Thinning Systems And Related Methods App 20200243337 - SEDDON; Michael J. ; et al.	2020-07-30
Semiconductor wafer thinning systems and related methods Grant 10,665,458 - Seddon , et al.	2020-05-26
Carbon-controlled ohmic contact layer for backside ohmic contact on a silicon carbide power semiconductor device Grant 10,629,686 - Pham , et al.	2020-04-21
Diode With Current Sensor App 20200111776 - ZENG; Xiang ; et al.	2020-04-09
Carbon-controlled Ohmic Contact Layer For Backside Ohmic Contact On A Silicon Carbide Power Semiconductor Device App 20200044031 - PHAM; Thi Thu Phuong ; et al.	2020-02-06
Semiconductor Substrate Singulation Systems And Related Methods App 20190362960 - SEDDON; Michael J. ; et al.	2019-11-28
Semiconductor Wafer Thinning Systems And Related Methods App 20190326117 - SEDDON; Michael J. ; et al.	2019-10-24
Semiconductor wafer thinning systems and related methods Grant 10,388,526 - Seddon , et al. A	2019-08-20
Method for testing an electric circuit Grant 7,191,085 - Neyer , et al. March 13, 2	2007-03-13
Method for testing an electric circuit App 20060049844 - Neyer; Thomas ; et al.	2006-03-09
Test apparatus with memory data converter for redundant bit and word lines App 20050270865 - Boldt, Sven ; et al.	2005-12-08

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.