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Patent applications and USPTO patent grants for Neves; Jose L. P..The latest application filed is for "automatic generation of wire tag lists for a metal stack".
Patent | Date |
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Automatic generation of wire tag lists for a metal stack Grant 9,092,591 - Alpert , et al. July 28, 2 | 2015-07-28 |
Early design cycle optimization Grant 9,038,009 - Alpert , et al. May 19, 2 | 2015-05-19 |
Automatic Generation of Wire Tag Lists for a Metal Stack App 20140223397 - Alpert; Charles J. ;   et al. | 2014-08-07 |
Automatic Generation of Wire Tag Lists for a Metal Stack App 20140195998 - Alpert; Charles J. ;   et al. | 2014-07-10 |
Automatic generation of wire tag lists for a metal stack Grant 8,769,468 - Alpert , et al. July 1, 2 | 2014-07-01 |
Early Design Cycle Optimzation App 20140101629 - Alpert; Charles Jay ;   et al. | 2014-04-10 |
Early design cycle optimzation Grant 8,640,075 - Alpert , et al. January 28, 2 | 2014-01-28 |
Early Design Cycle Optimzation App 20130326450 - Alpert; Charles Jay ;   et al. | 2013-12-05 |
Method of integrated circuit design by selection of noise tolerant gates Grant 6,490,708 - Cohn , et al. December 3, 2 | 2002-12-03 |
Method of integrated circuit design by selection of noise tolerant gates App 20020133791 - Cohn, John M. ;   et al. | 2002-09-19 |
Method for adding decoupling capacitance during integrated circuit design App 20020095647 - Bernstein, Kerry ;   et al. | 2002-07-18 |
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