| Patent | Date |
|---|
Wafer level integration and testing
Grant 5,366,906 - Wojnarowski , et al. November 22, 1 | 1994-11-22 |
Integrated heat sink having a sinuous fluid channel for the thermal dissipation of semiconductor modules
Grant 5,293,070 - Burgess , et al. March 8, 1 | 1994-03-08 |
Moisture-proof electrical circuit high density interconnect module and method for making same
Grant 5,291,066 - Neugebauer , et al. March 1, 1 | 1994-03-01 |
Hermetic package and packaged semiconductor chip having closely spaced leads extending through the package lid
Grant 5,209,390 - Temple , et al. May 11, 1 | 1993-05-11 |
Method for forming semiconductor electrical contacts using metal foil and thermocompression bonding
Grant 5,206,186 - Neugebauer , et al. April 27, 1 | 1993-04-27 |
Direct thermocompression bonding for thin electronic power chips
Grant 5,184,206 - Neugebauer , et al. February 2, 1 | 1993-02-02 |
Batch assembly of high density hermetic packages for power semiconductor chips
Grant 5,139,972 - Neugebauer , et al. August 18, 1 | 1992-08-18 |
Method of forming a hermetic package having a lead extending through an aperture in the package lid and packaged semiconductor chip
Grant 5,135,890 - Temple , et al. August 4, 1 | 1992-08-04 |
Method of packaging a semiconductor chip in a low inductance package
Grant 5,105,536 - Neugebauer , et al. April 21, 1 | 1992-04-21 |
Hermetic package having a lead extending through an aperture in the package lid and packaged semiconductor chip
Grant 5,103,290 - Temple , et al. April 7, 1 | 1992-04-07 |
Direct bonded symmetric-metallic-laminate/substrate structures
Grant 5,100,740 - Neugebauer , et al. March 31, 1 | 1992-03-31 |
Half bridge device package, packaged devices and circuits
Grant 5,043,859 - Korman , et al. August 27, 1 | 1991-08-27 |
High current hermetic package having a lead extending through the package lid and a packaged semiconductor chip
Grant 5,028,987 - Neugebauer , et al. July 2, 1 | 1991-07-02 |
High current hermetic package including an internal foil and having a lead extending through the package lid and a packaged semiconductor chip
Grant 5,018,002 - Neugebauer , et al. May 21, 1 | 1991-05-21 |
Enhanced direct bond structure
Grant 4,996,116 - Webster , et al. February 26, 1 | 1991-02-26 |
Multi-chip interconnection package
Grant 4,901,136 - Neugebauer , et al. February 13, 1 | 1990-02-13 |
Multilayer circuit board fabricated from silicon
Grant 4,803,450 - Burgess , et al. February 7, 1 | 1989-02-07 |
Hybrid integrated circuit chip package
Grant 4,774,632 - Neugebauer September 27, 1 | 1988-09-27 |
Method of fabricating gold bumps on IC's and power chips
Grant 4,750,666 - Neugebauer , et al. June 14, 1 | 1988-06-14 |
Silicon packages for power semiconductor devices
Grant 4,745,455 - Glascock, II , et al. May 17, 1 | 1988-05-17 |
Hermetic power chip packages
Grant 4,646,129 - Yerman , et al. February 24, 1 | 1987-02-24 |
Thyristor packaging system
Grant 4,574,299 - Glascock, II , et al. March 4, 1 | 1986-03-04 |
Reconstituted metal oxide varistor
Grant 4,103,274 - Burgess , et al. July 25, 1 | 1978-07-25 |
Bonds between metal and a non-metallic substrate
Grant 3,993,411 - Babcock , et al. November 23, 1 | 1976-11-23 |
Method for bonding metal to ceramic
Grant 3,911,553 - Burgess , et al. October 14, 1 | 1975-10-14 |
Direct Bonding Of Metals With A Metal-gas Eutectic
Grant 3,854,892 - Burgess , et al. December 17, 1 | 1974-12-17 |
Method Of Direct Bonding Metals To Non-metallic Substrates
Grant 3,766,634 - Babcock , et al. October 23, 1 | 1973-10-23 |
Direct Bonding Of Metals With A Metal-gas Eutectic
Grant 3,744,120 - Burgess , et al. July 10, 1 | 1973-07-10 |
High Speed Signal In Mos Circuits By Voltage Variable Capacitor
Grant 3,691,537 - Burgess , et al. September 12, 1 | 1972-09-12 |
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