Neuendorffer; Stephen A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Neuendorffer; Stephen A..The latest application filed is for "extracting system architecture in high level synthesis".

Company Profile

0.22.1

Neuendorffer; Stephen A. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Generation of vector codes for tensor convolutions Grant 11,422,781 - Neuendorffer , et al. August 23, 2	2022-08-23
Function calls in high level synthesis Grant 10,671,779 - Neuendorffer	2020-06-02
Operation processing for high level synthesis Grant 10,031,732 - Li , et al. July 24, 2	2018-07-24
Performance of circuitry generated using high-level synthesis Grant 9,824,172 - Hao , et al. November 21, 2	2017-11-21
Performance of circuitry generated using high-level synthesis Grant 9,710,584 - Hao , et al. July 18, 2	2017-07-18
Extracting system architecture in high level synthesis Grant 9,449,131 - Han , et al. September 20, 2	2016-09-20
Extracting System Architecture In High Level Synthesis App 20150347654 - Han; Guoling ; et al.	2015-12-03
Throughput during high level synthesis Grant 9,081,930 - Neuendorffer , et al. July 14, 2	2015-07-14
Specific memory controller implemented using reconfiguration Grant 8,359,448 - Neuendorffer January 22, 2	2013-01-22
Transforming device drivers to improve efficiency Grant 8,245,243 - Neuendorffer August 14, 2	2012-08-14
Methods of implementing relocatable circuits in a programmable integrated circuit device Grant 8,219,960 - Neuendorffer , et al. July 10, 2	2012-07-10
Method and apparatus for initializing a system configured in a programmable logic device Grant 8,122,239 - James-Roxby , et al. February 21, 2	2012-02-21
Dataflow FIFO communication buffer using highly-multiported memories Grant 8,116,334 - Neuendorffer February 14, 2	2012-02-14
Method and apparatus for implementing a dataflow circuit model using application-specific memory implementations Grant 8,020,139 - Neuendorffer , et al. September 13, 2	2011-09-13
Hardware interface in an integrated circuit Grant 7,969,187 - Neuendorffer , et al. June 28, 2	2011-06-28
Multi-rate simulation scheduler for synchronous digital circuits in a high level modeling system Grant 7,895,026 - Kelly , et al. February 22, 2	2011-02-22
Dataflow FIFO communication buffer using highly-multiported memories Grant 7,869,452 - Neuendorffer January 11, 2	2011-01-11
Interface generation for coupling to a high-bandwidth interface Grant 7,834,658 - Neuendorffer , et al. November 16, 2	2010-11-16
Relocatable circuit implemented in a programmable logic device Grant 7,765,512 - Neuendorffer , et al. July 27, 2	2010-07-27
Profiling circuit arrangement Grant 7,653,762 - Neuendorffer , et al. January 26, 2	2010-01-26
Validating partial reconfiguration of an integrated circuit Grant 7,541,833 - Neuendorffer , et al. June 2, 2	2009-06-02
Method and apparatus for accessing internal registers of hardware blocks in a programmable logic device Grant 7,525,343 - Neuendorffer , et al. April 28, 2	2009-04-28

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