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Patent applications and USPTO patent grants for Neto; Pedro W..The latest application filed is for "half-rate integrating decision feedback equalization with current steering".
Patent | Date |
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Low power device for high-speed time-interleaved sampling Grant 10,911,060 - Neto , et al. February 2, 2 | 2021-02-02 |
High-speed successive-approximation-register (SAR) analog-to-digital converter (ADC) control logic circuit Grant 10,862,496 - Neto December 8, 2 | 2020-12-08 |
Hybrid multiplying capacitive digital-to-analog converter (MC-DAC) based loop regulation Grant 10,848,171 - Carey , et al. November 24, 2 | 2020-11-24 |
Device for high-speed digital-to-analog conversion Grant 10,790,847 - Neto September 29, 2 | 2020-09-29 |
Low power and high-speed circuit for generating asynchronous clock signals Grant 10,763,879 - Neto Sep | 2020-09-01 |
Circuit for and method of implementing asynchronous clock generation Grant 10,236,901 - Neto | 2019-03-19 |
Half-rate integrating decision feedback equalization with current steering Grant 10,069,655 - Neto September 4, 2 | 2018-09-04 |
Half-rate Integrating Decision Feedback Equalization With Current Steering App 20170264467 - Neto; Pedro W. | 2017-09-14 |
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