Nequist; Eric M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nequist; Eric M..The latest application filed is for "3d chip with shared clock distribution network".

Company Profile

4.6.5

Nequist; Eric M. - Saratoga CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
3d Chip With Shared Clock Distribution Network App 20210104436 - DeLaCruz; Javier ; et al.	2021-04-08
Face-to-face mounted IC dies with orthogonal top interconnect layers Grant 10,892,252 - Nequist , et al. January 12, 2	2021-01-12
Face-to-Face Mounted IC Dies with Orthogonal Top Interconnect Layers App 20200203318 - Nequist; Eric M. ; et al.	2020-06-25
3D chip sharing power circuit Grant 10,672,663 - DeLaCruz , et al.	2020-06-02
3D chip sharing clock interconnect layer Grant 10,586,786 - DeLaCruz , et al.	2020-03-10
Face-to-face mounted IC dies with orthogonal top interconnect layers Grant 10,580,757 - Nequist , et al.	2020-03-03
3D Chip Sharing Clock Interconnect Layer App 20180350775 - DeLaCruz; Javier ; et al.	2018-12-06
Face-to-Face Mounted IC Dies with Orthogonal Top Interconnect Layers App 20180331072 - Nequist; Eric M. ; et al.	2018-11-15
3D Chip Sharing Power Circuit App 20180330993 - DeLaCruz; Javier ; et al.	2018-11-15
Mechanism and method to implement a reader mechanism for a container-based monitor of a consumable product Grant 8,717,182 - Brashears , et al. May 6, 2	2014-05-06

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