Neo; Chin Chuan
Patent Applications and Registrations
Patent applications and USPTO patent grants for Neo; Chin Chuan.The latest application filed is for "integrated circuits with aluminum via structures and methods for fabricating the same".
- Neo; Chin Chuan - Singapore SG
| Patent | Date |
|---|---|
| Integrated circuits with magnetic tunnel junction memory cells and methods for producing the same Grant 10,062,733 - Yi , et al. August 28, 2 | 2018-08-28 |
| Integrated circuits with aluminum via structures and methods for fabricating the same Grant 9,917,027 - Yi , et al. March 13, 2 | 2018-03-13 |
| Method of forming a via contact Grant 9,805,971 - Li , et al. October 31, 2 | 2017-10-31 |
| Integrated Circuits With Aluminum Via Structures And Methods For Fabricating The Same App 20170194229 - Yi; Wanbing ; et al. | 2017-07-06 |
| Etch bias control Grant 9,520,299 - Yi , et al. December 13, 2 | 2016-12-13 |
| Reliable Contacts App 20160276213 - LI; Rui ; et al. | 2016-09-22 |
| Etch Bias Control App 20160189971 - Yi; Wanbing ; et al. | 2016-06-30 |
| Method to fabricate aligned dual damascene openings Grant 7,372,156 - Lim , et al. May 13, 2 | 2008-05-13 |
| Method to fabricate aligned dual damacene openings App 20060003573 - Lim; Yeow Kheng ; et al. | 2006-01-05 |
| Method to fabricate aligned dual damascene openings Grant 6,967,156 - Lim , et al. November 22, 2 | 2005-11-22 |
| Method to fabricate aligned dual damascene openings App 20050090095 - Lim, Yeow Kheng ; et al. | 2005-04-28 |
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