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name:-0.025579929351807
name:-0.023786067962646
name:-0.0048940181732178
Nelson; Jerimy Patent Filings

Nelson; Jerimy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Nelson; Jerimy.The latest application filed is for "system and method for evaluating signal coupling between differential traces in a package design".

Company Profile
0.16.24
  • Nelson; Jerimy - Fort Collins CO
  • Nelson; Jerimy - Ft. Collins CO
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Routing power and ground vias in a substrate
Grant 7,327,583 - Nelson , et al. February 5, 2
2008-02-05
Routing vias in a substrate from bypass capacitor pads
Grant 7,326,860 - Nelson , et al. February 5, 2
2008-02-05
System and method for evaluating power and ground vias in a package design
Grant 7,272,806 - Frank , et al. September 18, 2
2007-09-18
System and method for integrating subcircuit models in an integrated power grid analysis environment
Grant 7,143,022 - Wang , et al. November 28, 2
2006-11-28
Systems and methods for generating node level bypass capacitor models
Grant 7,143,389 - Wang , et al. November 28, 2
2006-11-28
System and method for determining signal coupling coefficients for lines
Grant 7,137,088 - Frank , et al. November 14, 2
2006-11-14
System And Method For Evaluating Signal Coupling Between Differential Traces In A Package Design
App 20060236276 - Frank; Mark D. ;   et al.
2006-10-19
Routing vias in a substrate from bypass capacitor pads
App 20060225916 - Nelson; Jerimy ;   et al.
2006-10-12
System and method for evaluating signal coupling between differential traces in a package design
Grant 7,117,464 - Frank , et al. October 3, 2
2006-10-03
Routing differential signal lines in a substrate
Grant 7,078,812 - Frank , et al. July 18, 2
2006-07-18
Routing vias in a substrate from bypass capacitor pads
Grant 7,075,185 - Nelson , et al. July 11, 2
2006-07-11
System and method for populating a computer-aided design program's database with design parameters
Grant 7,069,095 - Nelson , et al. June 27, 2
2006-06-27
System and method for evaluating signal deviations in a package design
Grant 7,055,124 - Frank , et al. May 30, 2
2006-05-30
Routing power and ground vias in a substrate
App 20060055022 - Nelson; Jerimy ;   et al.
2006-03-16
Routing vias in a substrate from bypass capacitor pads
App 20060055049 - Nelson; Jerimy ;   et al.
2006-03-16
Routing differential signal lines in a substrate
App 20060043537 - Frank; Mark D. ;   et al.
2006-03-02
Systems and methods for generating node level bypass capacitor models
App 20060026542 - Wang; Yong ;   et al.
2006-02-02
System and method for determining signal coupling in a circuit design
App 20050251769 - Frank, Mark D. ;   et al.
2005-11-10
System and method for determining signal coupling coefficients for vias
App 20050249479 - Frank, Mark D. ;   et al.
2005-11-10
System and method for determining signal coupling coefficients for lines
App 20050251770 - Frank, Mark D. ;   et al.
2005-11-10
Differential via pair coupling verification tool
App 20050246670 - Bois, Karl J. ;   et al.
2005-11-03
Method and apparatus for determining worst case coupling within a differential pair group
App 20050246671 - Bois, Karl J. ;   et al.
2005-11-03
Differential trace pair coupling verification tool
App 20050246672 - Bois, Karl J. ;   et al.
2005-11-03
System and method for evaluating signal trace discontinuities in a package design
App 20050223348 - Frank, Mark D. ;   et al.
2005-10-06
System and method for maintaining homogeneity between a model in a computer-aided modeling system and corresponding model documentation
App 20050197807 - Nelson, Jerimy ;   et al.
2005-09-08
System and method for evaluating signal trace discontinuities in a package design
Grant 6,938,230 - Frank , et al. August 30, 2
2005-08-30
Verifying proximity of ground vias to signal vias in an integrated circuit
Grant 6,922,822 - Frank , et al. July 26, 2
2005-07-26
System and method for evaluating vias per pad in a package design
Grant 6,907,589 - Frank , et al. June 14, 2
2005-06-14
System and method for populating a computer-aided design program's database with design parameters
App 20050125747 - Nelson, Jerimy ;   et al.
2005-06-09
Inter-signal proximity verification in an integrated circuit
Grant 6,807,657 - Frank , et al. October 19, 2
2004-10-19
System and method for evaluating signal deviations in a package design
App 20040162714 - Frank, Mark D. ;   et al.
2004-08-19
System and method for evaluating power and ground vias in a package design
App 20040162715 - Frank, Mark D. ;   et al.
2004-08-19
System and method for evaluating signal coupling between vias in a package design
App 20040163056 - Frank, Mark D. ;   et al.
2004-08-19
System and method for evaluating signal coupling between differential traces in a package design
App 20040163058 - Frank, Mark D. ;   et al.
2004-08-19
System and method for evaluating vias per pad in a package design
App 20040163054 - Frank, Mark D. ;   et al.
2004-08-19
System and method for evaluating signal trace discontinuities in a package design
App 20040163057 - Frank, Mark D. ;   et al.
2004-08-19
Verifying proximity of ground metal to signal traces in an integrated circuit
Grant 6,769,102 - Frank , et al. July 27, 2
2004-07-27
Verifying proximity of ground vias to signal vias in an integrated circuit
App 20040015796 - Frank, Mark D. ;   et al.
2004-01-22
Inter-signal proximity verification in an integrated circuit
App 20040015806 - Frank, Mark D. ;   et al.
2004-01-22
Verifying proximity of ground metal to signal traces in an integrated circuit
App 20040015795 - Frank, Mark D. ;   et al.
2004-01-22

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