loadpatents
name:-0.00039100646972656
name:-0.020503997802734
name:-0.00046801567077637
Negi; Virendra S. Patent Filings

Negi; Virendra S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Negi; Virendra S..The latest application filed is for "test apparatus for testing a multilevel cache system with graceful degradation capability".

Company Profile
0.19.0
  • Negi; Virendra S. - Pepperell MA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Test apparatus for testing a multilevel cache system with graceful degradation capability
Grant 4,686,621 - Keeley , et al. August 11, 1
1987-08-11
Enable/disable control checking apparatus
Grant 4,667,288 - Keeley , et al. May 19, 1
1987-05-19
Directory test error mode control apparatus
Grant 4,562,536 - Keeley , et al. December 31, 1
1985-12-31
Data processor having units carry and tens carry apparatus supporting a decimal multiply operation
Grant 4,484,300 - Negi , et al. November 20, 1
1984-11-20
Clock system having a stall capability to enable processing of errors
Grant 4,462,072 - Tague , et al. July 24, 1
1984-07-24
Apparatus for setting the basic clock timing in a data processing system
Grant 4,447,870 - Tague , et al. May 8, 1
1984-05-08
Data processor using a read only memory for selecting a part of a register into which data is written
Grant 4,423,483 - Tague , et al. December 27, 1
1983-12-27
Diagnostic testing of the data path in a microprogrammed data processor
Grant 4,410,984 - Negi , et al. October 18, 1
1983-10-18
Data processor performing a decimal multiply operation using a read only memory
Grant 4,390,961 - Negi , et al. June 28, 1
1983-06-28
Data processor having carry apparatus supporting a decimal divide operation
Grant 4,384,341 - Tague , et al. May 17, 1
1983-05-17
Firmware controlled search and verify apparatus and method for a data processing system
Grant 4,384,343 - Morganti , et al. May 17, 1
1983-05-17
Local bus interface for controlling information transfers between units in a central subsystem
Grant 4,323,967 - Peters , et al. April 6, 1
1982-04-06
Self-evaluation system for determining the operational integrity of a data processing system
Grant 4,322,846 - Carroll , et al. March 30, 1
1982-03-30
Apparatus and method for next address generation in a data processing system
Grant 4,309,753 - Negi , et al. January 5, 1
1982-01-05
Binary coded decimal correction apparatus for use in an arithmetic unit of a data processing unit
Grant 4,245,328 - Negi , et al. January 13, 1
1981-01-13
Data processing interrupt apparatus having selective suppression control
Grant 4,218,739 - Negi , et al. August 19, 1
1980-08-19
Data processing system self-test enabling technique
Grant 4,127,768 - Negi , et al. November 28, 1
1978-11-28
Control store organization in a microprogrammed data processing system
Grant 4,070,703 - Negi January 24, 1
1978-01-24
Synchronization technique for data transfers over an asynchronous common bus network coupling data processing apparatus
Grant 4,050,097 - Miu , et al. September 20, 1
1977-09-20

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